|
@@ -109,7 +109,8 @@ enum mac_version {
|
|
RTL_GIGA_MAC_VER_17 = 0x10, // 8168Bf
|
|
RTL_GIGA_MAC_VER_17 = 0x10, // 8168Bf
|
|
RTL_GIGA_MAC_VER_18 = 0x12, // 8168CP
|
|
RTL_GIGA_MAC_VER_18 = 0x12, // 8168CP
|
|
RTL_GIGA_MAC_VER_19 = 0x13, // 8168C
|
|
RTL_GIGA_MAC_VER_19 = 0x13, // 8168C
|
|
- RTL_GIGA_MAC_VER_20 = 0x14 // 8168C
|
|
|
|
|
|
+ RTL_GIGA_MAC_VER_20 = 0x14, // 8168C
|
|
|
|
+ RTL_GIGA_MAC_VER_21 = 0x15 // 8168C
|
|
};
|
|
};
|
|
|
|
|
|
#define _R(NAME,MAC,MASK) \
|
|
#define _R(NAME,MAC,MASK) \
|
|
@@ -139,7 +140,8 @@ static const struct {
|
|
_R("RTL8101e", RTL_GIGA_MAC_VER_16, 0xff7e1880), // PCI-E
|
|
_R("RTL8101e", RTL_GIGA_MAC_VER_16, 0xff7e1880), // PCI-E
|
|
_R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_18, 0xff7e1880), // PCI-E
|
|
_R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_18, 0xff7e1880), // PCI-E
|
|
_R("RTL8168c/8111c", RTL_GIGA_MAC_VER_19, 0xff7e1880), // PCI-E
|
|
_R("RTL8168c/8111c", RTL_GIGA_MAC_VER_19, 0xff7e1880), // PCI-E
|
|
- _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_20, 0xff7e1880) // PCI-E
|
|
|
|
|
|
+ _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_20, 0xff7e1880), // PCI-E
|
|
|
|
+ _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_21, 0xff7e1880) // PCI-E
|
|
};
|
|
};
|
|
#undef _R
|
|
#undef _R
|
|
|
|
|
|
@@ -1220,6 +1222,7 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
|
|
{ 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_18 },
|
|
{ 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_18 },
|
|
{ 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 },
|
|
{ 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 },
|
|
{ 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 },
|
|
{ 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 },
|
|
|
|
+ { 0x7cf00000, 0x3c300000, RTL_GIGA_MAC_VER_21 },
|
|
{ 0x7c800000, 0x3c000000, RTL_GIGA_MAC_VER_20 },
|
|
{ 0x7c800000, 0x3c000000, RTL_GIGA_MAC_VER_20 },
|
|
|
|
|
|
/* 8168B family. */
|
|
/* 8168B family. */
|
|
@@ -1444,6 +1447,28 @@ static void rtl8168c_2_hw_phy_config(void __iomem *ioaddr)
|
|
mdio_write(ioaddr, 0x1f, 0x0000);
|
|
mdio_write(ioaddr, 0x1f, 0x0000);
|
|
}
|
|
}
|
|
|
|
|
|
|
|
+static void rtl8168c_3_hw_phy_config(void __iomem *ioaddr)
|
|
|
|
+{
|
|
|
|
+ struct phy_reg phy_reg_init[] = {
|
|
|
|
+ { 0x1f, 0x0001 },
|
|
|
|
+ { 0x12, 0x2300 },
|
|
|
|
+ { 0x1d, 0x3d98 },
|
|
|
|
+ { 0x1f, 0x0002 },
|
|
|
|
+ { 0x0c, 0x7eb8 },
|
|
|
|
+ { 0x06, 0x5461 },
|
|
|
|
+ { 0x1f, 0x0003 },
|
|
|
|
+ { 0x16, 0x0f0a },
|
|
|
|
+ { 0x1f, 0x0000 }
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
|
|
|
|
+
|
|
|
|
+ mdio_patch(ioaddr, 0x16, 1 << 0);
|
|
|
|
+ mdio_patch(ioaddr, 0x14, 1 << 5);
|
|
|
|
+ mdio_patch(ioaddr, 0x0d, 1 << 5);
|
|
|
|
+ mdio_write(ioaddr, 0x1f, 0x0000);
|
|
|
|
+}
|
|
|
|
+
|
|
static void rtl8102e_hw_phy_config(void __iomem *ioaddr)
|
|
static void rtl8102e_hw_phy_config(void __iomem *ioaddr)
|
|
{
|
|
{
|
|
struct phy_reg phy_reg_init[] = {
|
|
struct phy_reg phy_reg_init[] = {
|
|
@@ -1500,6 +1525,9 @@ static void rtl_hw_phy_config(struct net_device *dev)
|
|
case RTL_GIGA_MAC_VER_20:
|
|
case RTL_GIGA_MAC_VER_20:
|
|
rtl8168c_2_hw_phy_config(ioaddr);
|
|
rtl8168c_2_hw_phy_config(ioaddr);
|
|
break;
|
|
break;
|
|
|
|
+ case RTL_GIGA_MAC_VER_21:
|
|
|
|
+ rtl8168c_3_hw_phy_config(ioaddr);
|
|
|
|
+ break;
|
|
default:
|
|
default:
|
|
break;
|
|
break;
|
|
}
|
|
}
|
|
@@ -2490,6 +2518,11 @@ static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev)
|
|
__rtl_hw_start_8168cp(ioaddr, pdev);
|
|
__rtl_hw_start_8168cp(ioaddr, pdev);
|
|
}
|
|
}
|
|
|
|
|
|
|
|
+static void rtl_hw_start_8168c_3(void __iomem *ioaddr, struct pci_dev *pdev)
|
|
|
|
+{
|
|
|
|
+ rtl_hw_start_8168c_2(ioaddr, pdev);
|
|
|
|
+}
|
|
|
|
+
|
|
static void rtl_hw_start_8168(struct net_device *dev)
|
|
static void rtl_hw_start_8168(struct net_device *dev)
|
|
{
|
|
{
|
|
struct rtl8169_private *tp = netdev_priv(dev);
|
|
struct rtl8169_private *tp = netdev_priv(dev);
|
|
@@ -2545,6 +2578,10 @@ static void rtl_hw_start_8168(struct net_device *dev)
|
|
rtl_hw_start_8168c_2(ioaddr, pdev);
|
|
rtl_hw_start_8168c_2(ioaddr, pdev);
|
|
break;
|
|
break;
|
|
|
|
|
|
|
|
+ case RTL_GIGA_MAC_VER_21:
|
|
|
|
+ rtl_hw_start_8168c_3(ioaddr, pdev);
|
|
|
|
+ break;
|
|
|
|
+
|
|
default:
|
|
default:
|
|
printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
|
|
printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
|
|
dev->name, tp->mac_version);
|
|
dev->name, tp->mac_version);
|