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@@ -116,6 +116,7 @@ extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
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#define __S111 PAGE_SHARED_EXEC
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#ifndef __ASSEMBLY__
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+
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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@@ -169,7 +170,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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return __pte(val);
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}
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-
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#endif /* __ASSEMBLY__ */
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#ifdef CONFIG_X86_32
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@@ -178,4 +178,112 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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# include "pgtable_64.h"
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#endif
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+#ifndef __ASSEMBLY__
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+
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+#ifndef CONFIG_PARAVIRT
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+/*
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+ * Rules for using pte_update - it must be called after any PTE update which
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+ * has not been done using the set_pte / clear_pte interfaces. It is used by
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+ * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
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+ * updates should either be sets, clears, or set_pte_atomic for P->P
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+ * transitions, which means this hook should only be called for user PTEs.
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+ * This hook implies a P->P protection or access change has taken place, which
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+ * requires a subsequent TLB flush. The notification can optionally be delayed
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+ * until the TLB flush event by using the pte_update_defer form of the
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+ * interface, but care must be taken to assure that the flush happens while
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+ * still holding the same page table lock so that the shadow and primary pages
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+ * do not become out of sync on SMP.
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+ */
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+#define pte_update(mm, addr, ptep) do { } while (0)
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+#define pte_update_defer(mm, addr, ptep) do { } while (0)
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+#endif
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+
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+/* local pte updates need not use xchg for locking */
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+static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
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+{
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+ pte_t res = *ptep;
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+
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+ /* Pure native function needs no input for mm, addr */
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+ native_pte_clear(NULL, 0, ptep);
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+ return res;
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+}
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+
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+/*
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+ * We only update the dirty/accessed state if we set
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+ * the dirty bit by hand in the kernel, since the hardware
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+ * will do the accessed bit for us, and we don't want to
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+ * race with other CPU's that might be updating the dirty
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+ * bit at the same time.
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+ */
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+#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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+#define ptep_set_access_flags(vma, address, ptep, entry, dirty) \
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+({ \
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+ int __changed = !pte_same(*(ptep), entry); \
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+ if (__changed && dirty) { \
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+ *ptep = entry; \
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+ pte_update_defer((vma)->vm_mm, (address), (ptep)); \
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+ flush_tlb_page(vma, address); \
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+ } \
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+ __changed; \
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+})
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+
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+#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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+#define ptep_test_and_clear_young(vma, addr, ptep) ({ \
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+ int __ret = 0; \
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+ if (pte_young(*(ptep))) \
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+ __ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, \
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+ &(ptep)->pte); \
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+ if (__ret) \
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+ pte_update((vma)->vm_mm, addr, ptep); \
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+ __ret; \
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+})
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+
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+#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
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+#define ptep_clear_flush_young(vma, address, ptep) \
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+({ \
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+ int __young; \
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+ __young = ptep_test_and_clear_young((vma), (address), (ptep)); \
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+ if (__young) \
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+ flush_tlb_page(vma, address); \
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+ __young; \
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+})
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+
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+#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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+static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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+{
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+ pte_t pte = native_ptep_get_and_clear(ptep);
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+ pte_update(mm, addr, ptep);
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+ return pte;
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+}
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+
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+#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
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+static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
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+{
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+ pte_t pte;
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+ if (full) {
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+ /*
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+ * Full address destruction in progress; paravirt does not
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+ * care about updates and native needs no locking
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+ */
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+ pte = native_local_ptep_get_and_clear(ptep);
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+ } else {
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+ pte = ptep_get_and_clear(mm, addr, ptep);
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+ }
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+ return pte;
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+}
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+
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+#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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+static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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+{
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+ clear_bit(_PAGE_BIT_RW, &ptep->pte);
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+ pte_update(mm, addr, ptep);
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+}
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+
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+#ifndef CONFIG_PARAVIRT
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+#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
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+#endif /* !CONFIG_PARAVIRT */
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+
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+#include <asm-generic/pgtable.h>
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+#endif /* __ASSEMBLY__ */
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+
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#endif /* _ASM_X86_PGTABLE_H */
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Jeremy Fitzhardinge