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@@ -488,7 +488,17 @@ static void acpi_processor_idle(void)
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case ACPI_STATE_C3:
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- if (pr->flags.bm_check) {
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+ /*
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+ * disable bus master
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+ * bm_check implies we need ARB_DIS
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+ * !bm_check implies we need cache flush
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+ * bm_control implies whether we can do ARB_DIS
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+ *
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+ * That leaves a case where bm_check is set and bm_control is
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+ * not set. In that case we cannot do much, we enter C3
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+ * without doing anything.
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+ */
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+ if (pr->flags.bm_check && pr->flags.bm_control) {
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if (atomic_inc_return(&c3_cpu_count) ==
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num_online_cpus()) {
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/*
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@@ -497,7 +507,7 @@ static void acpi_processor_idle(void)
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*/
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acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
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}
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- } else {
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+ } else if (!pr->flags.bm_check) {
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/* SMP with no shared cache... Invalidate cache */
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ACPI_FLUSH_CPU_CACHE();
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}
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@@ -509,7 +519,7 @@ static void acpi_processor_idle(void)
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acpi_cstate_enter(cx);
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/* Get end time (ticks) */
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t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
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- if (pr->flags.bm_check) {
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+ if (pr->flags.bm_check && pr->flags.bm_control) {
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/* Enable bus master arbitration */
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atomic_dec(&c3_cpu_count);
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acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
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@@ -959,9 +969,9 @@ static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
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if (pr->flags.bm_check) {
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/* bus mastering control is necessary */
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if (!pr->flags.bm_control) {
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+ /* In this case we enter C3 without bus mastering */
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ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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- "C3 support requires bus mastering control\n"));
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- return;
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+ "C3 support without bus mastering control\n"));
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}
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} else {
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/*
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