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@@ -23,6 +23,9 @@ static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset,
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void bcma_core_chipcommon_init(struct bcma_drv_cc *cc)
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{
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+ u32 leddc_on = 10;
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+ u32 leddc_off = 90;
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+
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if (cc->core->id.rev >= 11)
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cc->status = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT);
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cc->capabilities = bcma_cc_read32(cc, BCMA_CC_CAP);
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@@ -38,6 +41,17 @@ void bcma_core_chipcommon_init(struct bcma_drv_cc *cc)
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bcma_pmu_init(cc);
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if (cc->capabilities & BCMA_CC_CAP_PCTL)
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pr_err("Power control not implemented!\n");
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+
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+ if (cc->core->id.rev >= 16) {
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+ if (cc->core->bus->sprom.leddc_on_time &&
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+ cc->core->bus->sprom.leddc_off_time) {
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+ leddc_on = cc->core->bus->sprom.leddc_on_time;
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+ leddc_off = cc->core->bus->sprom.leddc_off_time;
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+ }
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+ bcma_cc_write32(cc, BCMA_CC_GPIOTIMER,
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+ ((leddc_on << BCMA_CC_GPIOTIMER_ONTIME_SHIFT) |
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+ (leddc_off << BCMA_CC_GPIOTIMER_OFFTIME_SHIFT)));
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+ }
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}
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/* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */
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