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@@ -48,8 +48,8 @@
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#define INT_QUEUE_SIZE MUSYCC_NIQD
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/* RAM image of MUSYCC registers laid out as a C structure */
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- struct musycc_groupr
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- {
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+struct musycc_groupr
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+{
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VINT32 thp[32]; /* Transmit Head Pointer [5-29] */
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VINT32 tmp[32]; /* Transmit Message Pointer [5-30] */
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VINT32 rhp[32]; /* Receive Head Pointer [5-29] */
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@@ -67,11 +67,11 @@
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VINT32 mpd; /* Memory Protection Descriptor [5-18] */
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VINT32 mld; /* Message Length Descriptor [5-20] */
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VINT32 pcd; /* Port Configuration Descriptor [5-19] */
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- };
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+};
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/* hardware MUSYCC registers laid out as a C structure */
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- struct musycc_globalr
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- {
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+struct musycc_globalr
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+{
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VINT32 gbp; /* Group Base Pointer */
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VINT32 dacbp; /* Dual Address Cycle Base Pointer */
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VINT32 srd; /* Service Request Descriptor */
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@@ -100,7 +100,7 @@
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VINT32 pcd; /* Port Configuration Descriptor [5-19] */
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VINT32 rbist; /* Receive BIST status [5-4] */
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VINT32 tbist; /* Receive BIST status [5-4] */
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- };
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+};
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/* Global Config Descriptor bit macros */
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#define MUSYCC_GCD_ECLK_ENABLE 0x00000800 /* EBUS clock enable */
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