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@@ -629,23 +629,26 @@ int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
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}
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r = 0;
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- if (!dss_cache.irq_enabled) {
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- u32 mask;
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+ if (!mgr_manual_update(mgr)) {
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+ if (!dss_cache.irq_enabled) {
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+ u32 mask;
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- mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_ODD |
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- DISPC_IRQ_EVSYNC_EVEN;
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- if (dss_has_feature(FEAT_MGR_LCD2))
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- mask |= DISPC_IRQ_VSYNC2;
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+ mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_ODD |
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+ DISPC_IRQ_EVSYNC_EVEN;
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+ if (dss_has_feature(FEAT_MGR_LCD2))
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+ mask |= DISPC_IRQ_VSYNC2;
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- r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
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+ r = omap_dispc_register_isr(dss_apply_irq_handler,
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+ NULL, mask);
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- if (r)
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- DSSERR("failed to register apply isr\n");
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+ if (r)
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+ DSSERR("failed to register apply isr\n");
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- dss_cache.irq_enabled = true;
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- }
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+ dss_cache.irq_enabled = true;
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+ }
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- configure_dispc();
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+ configure_dispc();
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+ }
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spin_unlock_irqrestore(&dss_cache.lock, flags);
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