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@@ -6,7 +6,7 @@
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*
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* The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards.
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* Writing the driver was quite simple, since most of the job is
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- * done by the generic pci-ide support.
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+ * done by the generic pci-ide support.
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* The hard part was finding the CY82C693's datasheet on Cypress's
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* web page :-(. But Altavista solved this problem :-).
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*
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@@ -15,12 +15,12 @@
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* - I recently got a 16.8G IBM DTTA, so I was able to test it with
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* a large and fast disk - the results look great, so I'd say the
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* driver is working fine :-)
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- * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA
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- * - this is my first linux driver, so there's probably a lot of room
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+ * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA
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+ * - this is my first linux driver, so there's probably a lot of room
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* for optimizations and bug fixing, so feel free to do it.
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* - use idebus=xx parameter to set PCI bus speed - needed to calc
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* timings for PIO modes (default will be 40)
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- * - if using PIO mode it's a good idea to set the PIO mode and
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+ * - if using PIO mode it's a good idea to set the PIO mode and
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* 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda
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* - I had some problems with my IBM DHEA with PIO modes < 2
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* (lost interrupts) ?????
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@@ -110,11 +110,11 @@ typedef struct pio_clocks_s {
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* calc clocks using bus_speed
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* returns (rounded up) time in bus clocks for time in ns
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*/
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-static int calc_clk (int time, int bus_speed)
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+static int calc_clk(int time, int bus_speed)
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{
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int clocks;
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- clocks = (time*bus_speed+999)/1000 -1;
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+ clocks = (time*bus_speed+999)/1000 - 1;
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if (clocks < 0)
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clocks = 0;
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@@ -132,8 +132,8 @@ static int calc_clk (int time, int bus_speed)
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* NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used
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* for mode 3 and 4 drives 8 and 16-bit timings are the same
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*
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- */
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-static void compute_clocks (u8 pio, pio_clocks_t *p_pclk)
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+ */
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+static void compute_clocks(u8 pio, pio_clocks_t *p_pclk)
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{
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int clk1, clk2;
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int bus_speed = system_bus_clock(); /* get speed of PCI bus */
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@@ -158,7 +158,7 @@ static void compute_clocks (u8 pio, pio_clocks_t *p_pclk)
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clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */
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/* note: we use the same values for 16bit IOR and IOW
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- * those are all the same, since I don't have other
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+ * those are all the same, since I don't have other
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* timings than those from ide-lib.c
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*/
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@@ -186,7 +186,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
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outb(index, CY82_INDEX_PORT);
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data = inb(CY82_DATA_PORT);
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- printk (KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n",
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+ printk(KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n",
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drive->name, HWIF(drive)->channel, drive->select.b.unit,
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(data&0x3), ((data>>2)&1));
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#endif /* CY82C693_DEBUG_LOGS */
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@@ -202,7 +202,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
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mode & 3, single);
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#endif /* CY82C693_DEBUG_INFO */
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- /*
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+ /*
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* note: below we set the value for Bus Master IDE TimeOut Register
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* I'm not absolutly sure what this does, but it solved my problem
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* with IDE DMA and sound, so I now can play sound and work with
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@@ -216,8 +216,8 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
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outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT);
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outb(data, CY82_DATA_PORT);
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-#if CY82C693_DEBUG_INFO
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- printk (KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n",
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+#if CY82C693_DEBUG_INFO
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+ printk(KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n",
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drive->name, data);
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#endif /* CY82C693_DEBUG_INFO */
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}
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@@ -242,14 +242,14 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
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#if CY82C693_DEBUG_LOGS
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/* for debug let's show the register values */
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-
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- if (drive->select.b.unit == 0) {
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+
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+ if (drive->select.b.unit == 0) {
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/*
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- * get master drive registers
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+ * get master drive registers
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* address setup control register
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* is 32 bit !!!
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- */
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- pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
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+ */
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+ pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
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addrCtrl &= 0x0F;
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/* now let's get the remaining registers */
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@@ -261,7 +261,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
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* set slave drive registers
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* address setup control register
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* is 32 bit !!!
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- */
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+ */
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pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
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addrCtrl &= 0xF0;
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@@ -288,9 +288,9 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
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* set master drive
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* address setup control register
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* is 32 bit !!!
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- */
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+ */
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pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
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-
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+
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addrCtrl &= (~0xF);
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addrCtrl |= (unsigned int)pclk.address_time;
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pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
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@@ -299,14 +299,14 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
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pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r);
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pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w);
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pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8);
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-
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+
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addrCtrl &= 0xF;
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} else {
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/*
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* set slave drive
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* address setup control register
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* is 32 bit !!!
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- */
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+ */
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pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
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addrCtrl &= (~0xF0);
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@@ -320,7 +320,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
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addrCtrl >>= 4;
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addrCtrl &= 0xF;
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- }
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+ }
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#if CY82C693_DEBUG_INFO
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printk(KERN_INFO "%s (ch=%d, dev=%d): set PIO timing to "
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@@ -340,41 +340,41 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c
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#ifdef CY82C693_SETDMA_CLOCK
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u8 data = 0;
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-#endif /* CY82C693_SETDMA_CLOCK */
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+#endif /* CY82C693_SETDMA_CLOCK */
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/* write info about this verion of the driver */
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printk(KERN_INFO CY82_VERSION "\n");
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#ifdef CY82C693_SETDMA_CLOCK
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/* okay let's set the DMA clock speed */
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-
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- outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT);
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- data = inb(CY82_DATA_PORT);
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+
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+ outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT);
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+ data = inb(CY82_DATA_PORT);
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#if CY82C693_DEBUG_INFO
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printk(KERN_INFO "%s: Peripheral Configuration Register: 0x%X\n",
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name, data);
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#endif /* CY82C693_DEBUG_INFO */
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- /*
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+ /*
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* for some reason sometimes the DMA controller
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* speed is set to ATCLK/2 ???? - we fix this here
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- *
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+ *
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* note: i don't know what causes this strange behaviour,
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* but even changing the dma speed doesn't solve it :-(
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- * the ide performance is still only half the normal speed
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- *
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+ * the ide performance is still only half the normal speed
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+ *
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* if anybody knows what goes wrong with my machine, please
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* let me know - ASK
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- */
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+ */
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data |= 0x03;
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- outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT);
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- outb(data, CY82_DATA_PORT);
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+ outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT);
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+ outb(data, CY82_DATA_PORT);
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#if CY82C693_DEBUG_INFO
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- printk (KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n",
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+ printk(KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n",
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name, data);
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#endif /* CY82C693_DEBUG_INFO */
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@@ -423,7 +423,7 @@ static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_dev
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/* CY82C693 is more than only a IDE controller.
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Function 1 is primary IDE channel, function 2 - secondary. */
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- if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
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+ if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
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PCI_FUNC(dev->devfn) == 1) {
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dev2 = pci_get_slot(dev->bus, dev->devfn + 1);
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ret = ide_setup_pci_devices(dev, dev2, &cy82c693_chipset);
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