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@@ -329,8 +329,18 @@ InstructionTLBMiss:
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mfspr r11, SPRN_MD_TWC /* ....and get the pte address */
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lwz r10, 0(r11) /* Get the pte */
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+#ifdef CONFIG_SWAP
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+ /* do not set the _PAGE_ACCESSED bit of a non-present page */
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+ andi. r11, r10, _PAGE_PRESENT
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+ beq 4f
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+ ori r10, r10, _PAGE_ACCESSED
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+ mfspr r11, SPRN_MD_TWC /* get the pte address again */
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+ stw r10, 0(r11)
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+4:
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+#else
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ori r10, r10, _PAGE_ACCESSED
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stw r10, 0(r11)
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+#endif
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/* The Linux PTE won't go exactly into the MMU TLB.
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* Software indicator bits 21, 22 and 28 must be clear.
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@@ -395,8 +405,17 @@ DataStoreTLBMiss:
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DO_8xx_CPU6(0x3b80, r3)
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mtspr SPRN_MD_TWC, r11
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- mfspr r11, SPRN_MD_TWC /* get the pte address again */
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+#ifdef CONFIG_SWAP
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+ /* do not set the _PAGE_ACCESSED bit of a non-present page */
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+ andi. r11, r10, _PAGE_PRESENT
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+ beq 4f
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+ ori r10, r10, _PAGE_ACCESSED
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+4:
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+ /* and update pte in table */
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+#else
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ori r10, r10, _PAGE_ACCESSED
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+#endif
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+ mfspr r11, SPRN_MD_TWC /* get the pte address again */
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stw r10, 0(r11)
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/* The Linux PTE won't go exactly into the MMU TLB.
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@@ -575,7 +594,16 @@ DataTLBError:
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/* Update 'changed', among others.
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*/
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+#ifdef CONFIG_SWAP
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+ ori r10, r10, _PAGE_DIRTY|_PAGE_HWWRITE
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+ /* do not set the _PAGE_ACCESSED bit of a non-present page */
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+ andi. r11, r10, _PAGE_PRESENT
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+ beq 4f
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+ ori r10, r10, _PAGE_ACCESSED
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+4:
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+#else
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ori r10, r10, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
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+#endif
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mfspr r11, SPRN_MD_TWC /* Get pte address again */
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stw r10, 0(r11) /* and update pte in table */
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