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@@ -283,7 +283,8 @@ int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
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CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
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/* See if we got it */
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- ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG,
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+ ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
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+ CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
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CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
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EEPROM_SEM_TIMEOUT);
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if (ret >= 0) {
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@@ -322,7 +323,8 @@ static int iwl_init_otp_access(struct iwl_priv *priv)
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CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
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/* wait for clock to be ready */
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- ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
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+ ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
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+ CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
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CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
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25000);
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if (ret < 0)
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@@ -345,7 +347,8 @@ static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
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_iwl_write32(priv, CSR_EEPROM_REG,
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CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
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- ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
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+ ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
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+ CSR_EEPROM_REG_READ_VALID_MSK,
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CSR_EEPROM_REG_READ_VALID_MSK,
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IWL_EEPROM_ACCESS_TIMEOUT);
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if (ret < 0) {
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@@ -538,7 +541,8 @@ int iwl_eeprom_init(struct iwl_priv *priv)
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_iwl_write32(priv, CSR_EEPROM_REG,
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CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
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- ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
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+ ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
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+ CSR_EEPROM_REG_READ_VALID_MSK,
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CSR_EEPROM_REG_READ_VALID_MSK,
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IWL_EEPROM_ACCESS_TIMEOUT);
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if (ret < 0) {
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