|
@@ -141,13 +141,18 @@ h7202_timer_interrupt(int irq, void *dev_id)
|
|
|
/*
|
|
|
* mask multiplexed timer IRQs
|
|
|
*/
|
|
|
-static void inline mask_timerx_irq(struct irq_data *d)
|
|
|
+static void inline __mask_timerx_irq(unsigned int irq)
|
|
|
{
|
|
|
unsigned int bit;
|
|
|
- bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1));
|
|
|
+ bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1));
|
|
|
CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit;
|
|
|
}
|
|
|
|
|
|
+static void inline mask_timerx_irq(struct irq_data *d)
|
|
|
+{
|
|
|
+ __mask_timerx_irq(d->irq);
|
|
|
+}
|
|
|
+
|
|
|
/*
|
|
|
* unmask multiplexed timer IRQs
|
|
|
*/
|
|
@@ -196,7 +201,7 @@ void __init h7202_init_irq (void)
|
|
|
|
|
|
for (irq = IRQ_TIMER1;
|
|
|
irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) {
|
|
|
- mask_timerx_irq(irq);
|
|
|
+ __mask_timerx_irq(irq);
|
|
|
set_irq_chip(irq, &h7202_timerx_chip);
|
|
|
set_irq_handler(irq, handle_edge_irq);
|
|
|
set_irq_flags(irq, IRQF_VALID );
|