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[PATCH] x86: Fix potential overflow in perfctr reservation

While reviewing this code again I found a potential overflow of the bitmap.
The p4 oprofile can theoretically set bits beyond the reservation bitmap for
specific configurations. Avoid that by sizing the bitmaps properly.

Signed-off-by: Andi Kleen <ak@suse.de>
Andi Kleen 18 年之前
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共有 2 个文件被更改,包括 11 次插入8 次删除
  1. 5 4
      arch/i386/kernel/nmi.c
  2. 6 4
      arch/x86_64/kernel/nmi.c

+ 5 - 4
arch/i386/kernel/nmi.c

@@ -41,16 +41,17 @@ int nmi_watchdog_enabled;
  *   different subsystems this reservation system just tries to coordinate
  *   different subsystems this reservation system just tries to coordinate
  *   things a little
  *   things a little
  */
  */
-static DEFINE_PER_CPU(unsigned long, perfctr_nmi_owner);
-static DEFINE_PER_CPU(unsigned long, evntsel_nmi_owner[3]);
-
-static cpumask_t backtrace_mask = CPU_MASK_NONE;
 
 
 /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
 /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
  * offset from MSR_P4_BSU_ESCR0.  It will be the max for all platforms (for now)
  * offset from MSR_P4_BSU_ESCR0.  It will be the max for all platforms (for now)
  */
  */
 #define NMI_MAX_COUNTER_BITS 66
 #define NMI_MAX_COUNTER_BITS 66
+#define NMI_MAX_COUNTER_LONGS BITS_TO_LONGS(NMI_MAX_COUNTER_BITS)
 
 
+static DEFINE_PER_CPU(unsigned long, perfctr_nmi_owner[NMI_MAX_COUNTER_LONGS]);
+static DEFINE_PER_CPU(unsigned long, evntsel_nmi_owner[NMI_MAX_COUNTER_LONGS]);
+
+static cpumask_t backtrace_mask = CPU_MASK_NONE;
 /* nmi_active:
 /* nmi_active:
  * >0: the lapic NMI watchdog is active, but can be disabled
  * >0: the lapic NMI watchdog is active, but can be disabled
  * <0: the lapic NMI watchdog has not been set up, and cannot
  * <0: the lapic NMI watchdog has not been set up, and cannot

+ 6 - 4
arch/x86_64/kernel/nmi.c

@@ -39,15 +39,17 @@ int panic_on_unrecovered_nmi;
  *   different subsystems this reservation system just tries to coordinate
  *   different subsystems this reservation system just tries to coordinate
  *   things a little
  *   things a little
  */
  */
-static DEFINE_PER_CPU(unsigned, perfctr_nmi_owner);
-static DEFINE_PER_CPU(unsigned, evntsel_nmi_owner[2]);
-
-static cpumask_t backtrace_mask = CPU_MASK_NONE;
 
 
 /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
 /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
  * offset from MSR_P4_BSU_ESCR0.  It will be the max for all platforms (for now)
  * offset from MSR_P4_BSU_ESCR0.  It will be the max for all platforms (for now)
  */
  */
 #define NMI_MAX_COUNTER_BITS 66
 #define NMI_MAX_COUNTER_BITS 66
+#define NMI_MAX_COUNTER_LONGS BITS_TO_LONGS(NMI_MAX_COUNTER_BITS)
+
+static DEFINE_PER_CPU(unsigned, perfctr_nmi_owner[NMI_MAX_COUNTER_LONGS]);
+static DEFINE_PER_CPU(unsigned, evntsel_nmi_owner[NMI_MAX_COUNTER_LONGS]);
+
+static cpumask_t backtrace_mask = CPU_MASK_NONE;
 
 
 /* nmi_active:
 /* nmi_active:
  * >0: the lapic NMI watchdog is active, but can be disabled
  * >0: the lapic NMI watchdog is active, but can be disabled