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@@ -204,9 +204,8 @@ static void print_regs(struct udc *dev)
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DBG(dev, "DMA mode = BF (buffer fill mode)\n");
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dev_info(&dev->pdev->dev, "DMA mode (%s)\n", "BF");
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}
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- if (!use_dma) {
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+ if (!use_dma)
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dev_info(&dev->pdev->dev, "FIFO mode\n");
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- }
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DBG(dev, "-------------------------------------------------------\n");
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}
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@@ -570,9 +569,8 @@ udc_free_request(struct usb_ep *usbep, struct usb_request *usbreq)
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VDBG(ep->dev, "req->td_data=%p\n", req->td_data);
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/* free dma chain if created */
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- if (req->chain_len > 1) {
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+ if (req->chain_len > 1)
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udc_free_dma_chain(ep->dev, req);
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- }
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pci_pool_free(ep->dev->data_requests, req->td_data,
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req->td_phys);
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@@ -640,9 +638,8 @@ udc_txfifo_write(struct udc_ep *ep, struct usb_request *req)
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bytes = remaining;
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/* dwords first */
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- for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) {
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+ for (i = 0; i < bytes / UDC_DWORD_BYTES; i++)
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writel(*(buf + i), ep->txfifo);
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- }
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/* remaining bytes must be written by byte access */
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for (j = 0; j < bytes % UDC_DWORD_BYTES; j++) {
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@@ -661,9 +658,8 @@ static int udc_rxfifo_read_dwords(struct udc *dev, u32 *buf, int dwords)
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VDBG(dev, "udc_read_dwords(): %d dwords\n", dwords);
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- for (i = 0; i < dwords; i++) {
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+ for (i = 0; i < dwords; i++)
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*(buf + i) = readl(dev->rxfifo);
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- }
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return 0;
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}
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@@ -676,9 +672,8 @@ static int udc_rxfifo_read_bytes(struct udc *dev, u8 *buf, int bytes)
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VDBG(dev, "udc_read_bytes(): %d bytes\n", bytes);
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/* dwords first */
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- for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) {
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+ for (i = 0; i < bytes / UDC_DWORD_BYTES; i++)
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*((u32 *)(buf + (i<<2))) = readl(dev->rxfifo);
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- }
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/* remaining bytes must be read by byte access */
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if (bytes % UDC_DWORD_BYTES) {
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@@ -898,9 +893,8 @@ static struct udc_data_dma *udc_get_last_dma_desc(struct udc_request *req)
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struct udc_data_dma *td;
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td = req->td_data;
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- while (td && !(td->status & AMD_BIT(UDC_DMA_IN_STS_L))) {
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+ while (td && !(td->status & AMD_BIT(UDC_DMA_IN_STS_L)))
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td = phys_to_virt(td->next);
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- }
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return td;
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@@ -950,21 +944,18 @@ static int udc_create_dma_chain(
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dma_addr = DMA_DONT_USE;
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/* unset L bit in first desc for OUT */
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- if (!ep->in) {
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+ if (!ep->in)
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req->td_data->status &= AMD_CLEAR_BIT(UDC_DMA_IN_STS_L);
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- }
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/* alloc only new desc's if not already available */
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len = req->req.length / ep->ep.maxpacket;
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- if (req->req.length % ep->ep.maxpacket) {
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+ if (req->req.length % ep->ep.maxpacket)
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len++;
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- }
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if (len > req->chain_len) {
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/* shorter chain already allocated before */
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- if (req->chain_len > 1) {
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+ if (req->chain_len > 1)
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udc_free_dma_chain(ep->dev, req);
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- }
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req->chain_len = len;
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create_new_chain = 1;
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}
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@@ -1007,11 +998,12 @@ static int udc_create_dma_chain(
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/* link td and assign tx bytes */
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if (i == buf_len) {
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- if (create_new_chain) {
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+ if (create_new_chain)
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req->td_data->next = dma_addr;
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- } else {
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- /* req->td_data->next = virt_to_phys(td); */
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- }
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+ /*
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+ else
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+ req->td_data->next = virt_to_phys(td);
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+ */
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/* write tx bytes */
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if (ep->in) {
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/* first desc */
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@@ -1025,11 +1017,12 @@ static int udc_create_dma_chain(
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UDC_DMA_IN_STS_TXBYTES);
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}
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} else {
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- if (create_new_chain) {
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+ if (create_new_chain)
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last->next = dma_addr;
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- } else {
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- /* last->next = virt_to_phys(td); */
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- }
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+ /*
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+ else
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+ last->next = virt_to_phys(td);
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+ */
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if (ep->in) {
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/* write tx bytes */
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td->status = AMD_ADDBITS(td->status,
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@@ -1480,11 +1473,10 @@ static int startup_registers(struct udc *dev)
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/* program speed */
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tmp = readl(&dev->regs->cfg);
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- if (use_fullspeed) {
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+ if (use_fullspeed)
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tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_FS, UDC_DEVCFG_SPD);
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- } else {
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+ else
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tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_HS, UDC_DEVCFG_SPD);
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- }
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writel(tmp, &dev->regs->cfg);
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return 0;
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@@ -1505,9 +1497,8 @@ static void udc_basic_init(struct udc *dev)
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mod_timer(&udc_timer, jiffies - 1);
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}
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/* stop poll stall timer */
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- if (timer_pending(&udc_pollstall_timer)) {
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+ if (timer_pending(&udc_pollstall_timer))
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mod_timer(&udc_pollstall_timer, jiffies - 1);
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- }
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/* disable DMA */
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tmp = readl(&dev->regs->ctl);
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tmp &= AMD_UNMASK_BIT(UDC_DEVCTL_RDE);
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@@ -1541,11 +1532,10 @@ static void udc_setup_endpoints(struct udc *dev)
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/* read enum speed */
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tmp = readl(&dev->regs->sts);
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tmp = AMD_GETBITS(tmp, UDC_DEVSTS_ENUM_SPEED);
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- if (tmp == UDC_DEVSTS_ENUM_SPEED_HIGH) {
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+ if (tmp == UDC_DEVSTS_ENUM_SPEED_HIGH)
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dev->gadget.speed = USB_SPEED_HIGH;
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- } else if (tmp == UDC_DEVSTS_ENUM_SPEED_FULL) {
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+ else if (tmp == UDC_DEVSTS_ENUM_SPEED_FULL)
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dev->gadget.speed = USB_SPEED_FULL;
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- }
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/* set basic ep parameters */
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for (tmp = 0; tmp < UDC_EP_NUM; tmp++) {
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@@ -1571,9 +1561,8 @@ static void udc_setup_endpoints(struct udc *dev)
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* disabling ep interrupts when ENUM interrupt occurs but ep is
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* not enabled by gadget driver
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*/
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- if (!ep->desc) {
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+ if (!ep->desc)
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ep_init(dev->regs, ep);
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- }
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if (use_dma) {
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/*
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@@ -1671,9 +1660,8 @@ static void udc_tasklet_disconnect(unsigned long par)
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spin_lock(&dev->lock);
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/* empty queues */
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- for (tmp = 0; tmp < UDC_EP_NUM; tmp++) {
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+ for (tmp = 0; tmp < UDC_EP_NUM; tmp++)
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empty_req_queue(&dev->ep[tmp]);
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- }
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}
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@@ -1747,9 +1735,8 @@ static void udc_timer_function(unsigned long v)
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* open the fifo
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*/
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udc_timer.expires = jiffies + HZ/UDC_RDE_TIMER_DIV;
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- if (!stop_timer) {
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+ if (!stop_timer)
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add_timer(&udc_timer);
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- }
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} else {
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/*
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* fifo contains data now, setup timer for opening
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@@ -1761,9 +1748,8 @@ static void udc_timer_function(unsigned long v)
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set_rde++;
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/* debug: lhadmot_timer_start = 221070 */
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udc_timer.expires = jiffies + HZ*UDC_RDE_TIMER_SECONDS;
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- if (!stop_timer) {
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+ if (!stop_timer)
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add_timer(&udc_timer);
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- }
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}
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} else
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@@ -1908,19 +1894,17 @@ static void activate_control_endpoints(struct udc *dev)
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mod_timer(&udc_timer, jiffies - 1);
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}
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/* stop pollstall timer */
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- if (timer_pending(&udc_pollstall_timer)) {
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+ if (timer_pending(&udc_pollstall_timer))
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mod_timer(&udc_pollstall_timer, jiffies - 1);
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- }
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/* enable DMA */
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tmp = readl(&dev->regs->ctl);
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tmp |= AMD_BIT(UDC_DEVCTL_MODE)
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| AMD_BIT(UDC_DEVCTL_RDE)
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| AMD_BIT(UDC_DEVCTL_TDE);
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- if (use_dma_bufferfill_mode) {
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+ if (use_dma_bufferfill_mode)
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tmp |= AMD_BIT(UDC_DEVCTL_BF);
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- } else if (use_dma_ppb_du) {
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+ else if (use_dma_ppb_du)
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tmp |= AMD_BIT(UDC_DEVCTL_DU);
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- }
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writel(tmp, &dev->regs->ctl);
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}
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@@ -2105,9 +2089,8 @@ static void udc_ep0_set_rde(struct udc *dev)
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udc_timer.expires =
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jiffies + HZ/UDC_RDE_TIMER_DIV;
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set_rde = 1;
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- if (!stop_timer) {
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+ if (!stop_timer)
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add_timer(&udc_timer);
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- }
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}
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}
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}
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@@ -2295,9 +2278,8 @@ static irqreturn_t udc_data_out_isr(struct udc *dev, int ep_ix)
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jiffies
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+ HZ*UDC_RDE_TIMER_SECONDS;
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set_rde = 1;
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- if (!stop_timer) {
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+ if (!stop_timer)
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add_timer(&udc_timer);
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- }
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}
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if (ep->num != UDC_EP0OUT_IX)
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dev->data_ep_queued = 0;
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@@ -2319,9 +2301,8 @@ static irqreturn_t udc_data_out_isr(struct udc *dev, int ep_ix)
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/* check pending CNAKS */
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if (cnak_pending) {
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/* CNAk processing when rxfifo empty only */
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- if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) {
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+ if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY))
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udc_process_cnak_queue(dev);
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- }
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}
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/* clear OUT bits in ep status */
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@@ -2582,9 +2563,8 @@ __acquires(dev->lock)
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if (!timer_pending(&udc_timer)) {
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udc_timer.expires = jiffies +
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HZ/UDC_RDE_TIMER_DIV;
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- if (!stop_timer) {
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+ if (!stop_timer)
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add_timer(&udc_timer);
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- }
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}
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}
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@@ -2698,9 +2678,8 @@ __acquires(dev->lock)
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/* check pending CNAKS */
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if (cnak_pending) {
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/* CNAk processing when rxfifo empty only */
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- if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) {
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+ if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY))
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udc_process_cnak_queue(dev);
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- }
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}
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finished:
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