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@@ -300,6 +300,7 @@ static void s3c_hsotg_init_fifo(struct s3c_hsotg *hsotg)
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unsigned int ep;
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unsigned int addr;
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unsigned int size;
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+ int timeout;
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u32 val;
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/* the ryu 2.6.24 release ahs
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@@ -335,6 +336,31 @@ static void s3c_hsotg_init_fifo(struct s3c_hsotg *hsotg)
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writel(val, hsotg->regs + S3C_DPTXFSIZn(ep));
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}
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+
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+ /* according to p428 of the design guide, we need to ensure that
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+ * all fifos are flushed before continuing */
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+
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+ writel(S3C_GRSTCTL_TxFNum(0x10) | S3C_GRSTCTL_TxFFlsh |
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+ S3C_GRSTCTL_RxFFlsh, hsotg->regs + S3C_GRSTCTL);
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+
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+ /* wait until the fifos are both flushed */
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+ timeout = 100;
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+ while (1) {
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+ val = readl(hsotg->regs + S3C_GRSTCTL);
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+
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+ if ((val & (S3C_GRSTCTL_TxFFlsh | S3C_GRSTCTL_RxFFlsh)) == 0)
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+ break;
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+
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+ if (--timeout == 0) {
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+ dev_err(hsotg->dev,
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+ "%s: timeout flushing fifos (GRSTCTL=%08x)\n",
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+ __func__, val);
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+ }
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+
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+ udelay(1);
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+ }
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+
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+ dev_dbg(hsotg->dev, "FIFOs reset, timeout at %d\n", timeout);
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}
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/**
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