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@@ -172,11 +172,6 @@ static struct clk pxa27x_clks[] = {
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#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
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#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
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#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
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#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
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-#define RESTORE_GPLEVEL(n) do { \
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- GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
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- GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
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-} while (0)
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-
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/*
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/*
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* List of global PXA peripheral registers to preserve.
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* List of global PXA peripheral registers to preserve.
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* More ones like CP and general purpose register values are preserved
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* More ones like CP and general purpose register values are preserved
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@@ -184,10 +179,6 @@ static struct clk pxa27x_clks[] = {
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*/
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*/
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enum { SLEEP_SAVE_START = 0,
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enum { SLEEP_SAVE_START = 0,
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- SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3,
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- SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3,
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- SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3,
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- SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3,
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SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
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SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
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SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
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SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
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@@ -208,10 +199,6 @@ enum { SLEEP_SAVE_START = 0,
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void pxa27x_cpu_pm_save(unsigned long *sleep_save)
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void pxa27x_cpu_pm_save(unsigned long *sleep_save)
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{
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{
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- SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2); SAVE(GPLR3);
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- SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2); SAVE(GPDR3);
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- SAVE(GRER0); SAVE(GRER1); SAVE(GRER2); SAVE(GRER3);
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- SAVE(GFER0); SAVE(GFER1); SAVE(GFER2); SAVE(GFER3);
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SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3);
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SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3);
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SAVE(GAFR0_L); SAVE(GAFR0_U);
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SAVE(GAFR0_L); SAVE(GAFR0_U);
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@@ -225,9 +212,6 @@ void pxa27x_cpu_pm_save(unsigned long *sleep_save)
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SAVE(CKEN);
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SAVE(CKEN);
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SAVE(PSTR);
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SAVE(PSTR);
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-
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- /* Clear GPIO transition detect bits */
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- GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2; GEDR3 = GEDR3;
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}
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}
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void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
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void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
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@@ -236,15 +220,10 @@ void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
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PSPR = 0;
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PSPR = 0;
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/* restore registers */
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/* restore registers */
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- RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1);
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- RESTORE_GPLEVEL(2); RESTORE_GPLEVEL(3);
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- RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GPDR3);
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RESTORE(GAFR0_L); RESTORE(GAFR0_U);
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RESTORE(GAFR0_L); RESTORE(GAFR0_U);
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RESTORE(GAFR1_L); RESTORE(GAFR1_U);
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RESTORE(GAFR1_L); RESTORE(GAFR1_U);
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RESTORE(GAFR2_L); RESTORE(GAFR2_U);
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RESTORE(GAFR2_L); RESTORE(GAFR2_U);
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RESTORE(GAFR3_L); RESTORE(GAFR3_U);
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RESTORE(GAFR3_L); RESTORE(GAFR3_U);
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- RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); RESTORE(GRER3);
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- RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); RESTORE(GFER3);
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RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3);
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RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3);
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RESTORE(MDREFR);
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RESTORE(MDREFR);
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@@ -412,6 +391,8 @@ static struct sys_device pxa27x_sysdev[] = {
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}, {
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}, {
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.id = 1,
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.id = 1,
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.cls = &pxa_irq_sysclass,
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.cls = &pxa_irq_sysclass,
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+ }, {
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+ .cls = &pxa_gpio_sysclass,
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},
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},
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};
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};
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