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@@ -42,12 +42,12 @@ struct cpu_hw_counters {
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* struct pmc_x86_ops - performance counter x86 ops
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*/
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struct pmc_x86_ops {
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- u64 (*save_disable_all) (void);
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- void (*restore_all) (u64 ctrl);
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- unsigned eventsel;
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- unsigned perfctr;
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- int (*event_map) (int event);
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- int max_events;
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+ u64 (*save_disable_all)(void);
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+ void (*restore_all)(u64 ctrl);
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+ unsigned eventsel;
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+ unsigned perfctr;
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+ int (*event_map)(int event);
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+ int max_events;
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};
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static struct pmc_x86_ops *pmc_ops;
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@@ -561,7 +561,7 @@ perf_handle_group(struct perf_counter *sibling, u64 *status, u64 *overflown)
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/*
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* Maximum interrupt frequency of 100KHz per CPU
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*/
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-#define PERFMON_MAX_INTERRUPTS 100000/HZ
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+#define PERFMON_MAX_INTERRUPTS (100000/HZ)
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/*
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* This handler is triggered by the local APIC, so the APIC IRQ handling
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