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@@ -19,6 +19,7 @@
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#include "omap_hwmod_common_data.h"
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#include "omap_hwmod_common_data.h"
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#include "prm-regbits-24xx.h"
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#include "prm-regbits-24xx.h"
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+#include "cm-regbits-24xx.h"
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/*
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/*
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* OMAP2430 hardware module integration data
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* OMAP2430 hardware module integration data
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@@ -33,6 +34,7 @@ static struct omap_hwmod omap2430_mpu_hwmod;
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static struct omap_hwmod omap2430_iva_hwmod;
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static struct omap_hwmod omap2430_iva_hwmod;
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static struct omap_hwmod omap2430_l3_main_hwmod;
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static struct omap_hwmod omap2430_l3_main_hwmod;
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static struct omap_hwmod omap2430_l4_core_hwmod;
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static struct omap_hwmod omap2430_l4_core_hwmod;
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+static struct omap_hwmod omap2430_wd_timer2_hwmod;
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/* L3 -> L4_CORE interface */
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/* L3 -> L4_CORE interface */
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static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
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static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
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@@ -165,12 +167,74 @@ static struct omap_hwmod omap2430_iva_hwmod = {
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
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};
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};
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+/* l4_wkup -> wd_timer2 */
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+static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = {
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+ {
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+ .pa_start = 0x49016000,
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+ .pa_end = 0x4901607f,
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+ .flags = ADDR_TYPE_RT
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+ },
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+};
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+
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+static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
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+ .master = &omap2430_l4_wkup_hwmod,
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+ .slave = &omap2430_wd_timer2_hwmod,
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+ .clk = "mpu_wdt_ick",
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+ .addr = omap2430_wd_timer2_addrs,
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+ .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs),
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/*
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+ * 'wd_timer' class
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+ * 32-bit watchdog upward counter that generates a pulse on the reset pin on
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+ * overflow condition
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+ */
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+
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+static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = {
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+ .rev_offs = 0x0,
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+ .sysc_offs = 0x0010,
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+ .syss_offs = 0x0014,
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+ .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
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+ SYSC_HAS_AUTOIDLE),
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+ .sysc_fields = &omap_hwmod_sysc_type1,
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+};
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+
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+static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = {
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+ .name = "wd_timer",
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+ .sysc = &omap2430_wd_timer_sysc,
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+};
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+
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+/* wd_timer2 */
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+static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
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+ &omap2430_l4_wkup__wd_timer2,
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+};
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+
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+static struct omap_hwmod omap2430_wd_timer2_hwmod = {
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+ .name = "wd_timer2",
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+ .class = &omap2430_wd_timer_hwmod_class,
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+ .main_clk = "mpu_wdt_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
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+ .module_offs = WKUP_MOD,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
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+ },
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+ },
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+ .slaves = omap2430_wd_timer2_slaves,
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+ .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves),
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+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
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+};
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+
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static __initdata struct omap_hwmod *omap2430_hwmods[] = {
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static __initdata struct omap_hwmod *omap2430_hwmods[] = {
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&omap2430_l3_main_hwmod,
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&omap2430_l3_main_hwmod,
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&omap2430_l4_core_hwmod,
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&omap2430_l4_core_hwmod,
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&omap2430_l4_wkup_hwmod,
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&omap2430_l4_wkup_hwmod,
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&omap2430_mpu_hwmod,
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&omap2430_mpu_hwmod,
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&omap2430_iva_hwmod,
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&omap2430_iva_hwmod,
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+ &omap2430_wd_timer2_hwmod,
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NULL,
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NULL,
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};
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};
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