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@@ -3,6 +3,7 @@
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*
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* Copyright (C) 2003 Ken Chen <kenneth.w.chen@intel.com>
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* Copyright (C) 2003 Asit Mallick <asit.k.mallick@intel.com>
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+ * Copyright (C) 2005 Christoph Lameter <clameter@sgi.com>
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*
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* Based on asm-i386/rwsem.h and other architecture implementation.
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*
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@@ -11,9 +12,9 @@
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*
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* The lock count is initialized to 0 (no active and no waiting lockers).
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*
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- * When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case
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- * of an uncontended lock. Readers increment by 1 and see a positive value
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- * when uncontended, negative if there are writers (and maybe) readers
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+ * When a writer subtracts WRITE_BIAS, it'll get 0xffffffff00000001 for
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+ * the case of an uncontended lock. Readers increment by 1 and see a positive
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+ * value when uncontended, negative if there are writers (and maybe) readers
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* waiting (in which case it goes to sleep).
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*/
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@@ -29,7 +30,7 @@
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* the semaphore definition
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*/
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struct rw_semaphore {
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- signed int count;
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+ signed long count;
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spinlock_t wait_lock;
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struct list_head wait_list;
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#if RWSEM_DEBUG
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@@ -37,10 +38,10 @@ struct rw_semaphore {
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#endif
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};
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-#define RWSEM_UNLOCKED_VALUE 0x00000000
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-#define RWSEM_ACTIVE_BIAS 0x00000001
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-#define RWSEM_ACTIVE_MASK 0x0000ffff
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-#define RWSEM_WAITING_BIAS (-0x00010000)
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+#define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000)
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+#define RWSEM_ACTIVE_BIAS __IA64_UL_CONST(0x0000000000000001)
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+#define RWSEM_ACTIVE_MASK __IA64_UL_CONST(0x00000000ffffffff)
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+#define RWSEM_WAITING_BIAS -__IA64_UL_CONST(0x0000000100000000)
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#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
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#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
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@@ -83,7 +84,7 @@ init_rwsem (struct rw_semaphore *sem)
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static inline void
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__down_read (struct rw_semaphore *sem)
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{
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- int result = ia64_fetchadd4_acq((unsigned int *)&sem->count, 1);
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+ long result = ia64_fetchadd8_acq((unsigned long *)&sem->count, 1);
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if (result < 0)
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rwsem_down_read_failed(sem);
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@@ -95,7 +96,7 @@ __down_read (struct rw_semaphore *sem)
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static inline void
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__down_write (struct rw_semaphore *sem)
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{
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- int old, new;
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+ long old, new;
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do {
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old = sem->count;
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@@ -112,7 +113,7 @@ __down_write (struct rw_semaphore *sem)
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static inline void
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__up_read (struct rw_semaphore *sem)
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{
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- int result = ia64_fetchadd4_rel((unsigned int *)&sem->count, -1);
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+ long result = ia64_fetchadd8_rel((unsigned long *)&sem->count, -1);
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if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0)
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rwsem_wake(sem);
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@@ -124,7 +125,7 @@ __up_read (struct rw_semaphore *sem)
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static inline void
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__up_write (struct rw_semaphore *sem)
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{
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- int old, new;
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+ long old, new;
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do {
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old = sem->count;
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@@ -141,7 +142,7 @@ __up_write (struct rw_semaphore *sem)
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static inline int
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__down_read_trylock (struct rw_semaphore *sem)
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{
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- int tmp;
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+ long tmp;
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while ((tmp = sem->count) >= 0) {
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if (tmp == cmpxchg_acq(&sem->count, tmp, tmp+1)) {
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return 1;
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@@ -156,7 +157,7 @@ __down_read_trylock (struct rw_semaphore *sem)
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static inline int
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__down_write_trylock (struct rw_semaphore *sem)
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{
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- int tmp = cmpxchg_acq(&sem->count, RWSEM_UNLOCKED_VALUE,
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+ long tmp = cmpxchg_acq(&sem->count, RWSEM_UNLOCKED_VALUE,
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RWSEM_ACTIVE_WRITE_BIAS);
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return tmp == RWSEM_UNLOCKED_VALUE;
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}
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@@ -167,7 +168,7 @@ __down_write_trylock (struct rw_semaphore *sem)
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static inline void
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__downgrade_write (struct rw_semaphore *sem)
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{
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- int old, new;
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+ long old, new;
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do {
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old = sem->count;
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@@ -182,7 +183,7 @@ __downgrade_write (struct rw_semaphore *sem)
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* Implement atomic add functionality. These used to be "inline" functions, but GCC v3.1
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* doesn't quite optimize this stuff right and ends up with bad calls to fetchandadd.
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*/
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-#define rwsem_atomic_add(delta, sem) atomic_add(delta, (atomic_t *)(&(sem)->count))
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-#define rwsem_atomic_update(delta, sem) atomic_add_return(delta, (atomic_t *)(&(sem)->count))
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+#define rwsem_atomic_add(delta, sem) atomic64_add(delta, (atomic64_t *)(&(sem)->count))
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+#define rwsem_atomic_update(delta, sem) atomic64_add_return(delta, (atomic64_t *)(&(sem)->count))
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#endif /* _ASM_IA64_RWSEM_H */
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