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@@ -29,19 +29,18 @@
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#include <linux/slab.h>
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#include <linux/basic_mmio_gpio.h>
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#include <linux/module.h>
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-#include <mach/mxs.h>
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#define MXS_SET 0x4
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#define MXS_CLR 0x8
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-#define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10)
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-#define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10)
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-#define PINCTRL_DOE(n) ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10)
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-#define PINCTRL_PIN2IRQ(n) ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10)
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-#define PINCTRL_IRQEN(n) ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10)
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-#define PINCTRL_IRQLEV(n) ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10)
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-#define PINCTRL_IRQPOL(n) ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10)
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-#define PINCTRL_IRQSTAT(n) ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10)
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+#define PINCTRL_DOUT(p) ((is_imx23_gpio(p) ? 0x0500 : 0x0700) + (p->id) * 0x10)
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+#define PINCTRL_DIN(p) ((is_imx23_gpio(p) ? 0x0600 : 0x0900) + (p->id) * 0x10)
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+#define PINCTRL_DOE(p) ((is_imx23_gpio(p) ? 0x0700 : 0x0b00) + (p->id) * 0x10)
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+#define PINCTRL_PIN2IRQ(p) ((is_imx23_gpio(p) ? 0x0800 : 0x1000) + (p->id) * 0x10)
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+#define PINCTRL_IRQEN(p) ((is_imx23_gpio(p) ? 0x0900 : 0x1100) + (p->id) * 0x10)
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+#define PINCTRL_IRQLEV(p) ((is_imx23_gpio(p) ? 0x0a00 : 0x1200) + (p->id) * 0x10)
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+#define PINCTRL_IRQPOL(p) ((is_imx23_gpio(p) ? 0x0b00 : 0x1300) + (p->id) * 0x10)
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+#define PINCTRL_IRQSTAT(p) ((is_imx23_gpio(p) ? 0x0c00 : 0x1400) + (p->id) * 0x10)
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#define GPIO_INT_FALL_EDGE 0x0
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#define GPIO_INT_LOW_LEV 0x1
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@@ -52,14 +51,30 @@
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#define irq_to_gpio(irq) ((irq) - MXS_GPIO_IRQ_START)
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+enum mxs_gpio_id {
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+ IMX23_GPIO,
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+ IMX28_GPIO,
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+};
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+
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struct mxs_gpio_port {
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void __iomem *base;
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int id;
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int irq;
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int virtual_irq_start;
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struct bgpio_chip bgc;
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+ enum mxs_gpio_id devid;
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};
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+static inline int is_imx23_gpio(struct mxs_gpio_port *port)
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+{
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+ return port->devid == IMX23_GPIO;
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+}
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+
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+static inline int is_imx28_gpio(struct mxs_gpio_port *port)
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+{
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+ return port->devid == IMX28_GPIO;
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+}
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+
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/* Note: This driver assumes 32 GPIOs are handled in one register */
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static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
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@@ -89,21 +104,21 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
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}
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/* set level or edge */
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- pin_addr = port->base + PINCTRL_IRQLEV(port->id);
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+ pin_addr = port->base + PINCTRL_IRQLEV(port);
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if (edge & GPIO_INT_LEV_MASK)
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writel(pin_mask, pin_addr + MXS_SET);
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else
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writel(pin_mask, pin_addr + MXS_CLR);
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/* set polarity */
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- pin_addr = port->base + PINCTRL_IRQPOL(port->id);
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+ pin_addr = port->base + PINCTRL_IRQPOL(port);
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if (edge & GPIO_INT_POL_MASK)
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writel(pin_mask, pin_addr + MXS_SET);
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else
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writel(pin_mask, pin_addr + MXS_CLR);
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writel(1 << (gpio & 0x1f),
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- port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR);
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+ port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
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return 0;
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}
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@@ -117,8 +132,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
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desc->irq_data.chip->irq_ack(&desc->irq_data);
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- irq_stat = readl(port->base + PINCTRL_IRQSTAT(port->id)) &
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- readl(port->base + PINCTRL_IRQEN(port->id));
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+ irq_stat = readl(port->base + PINCTRL_IRQSTAT(port)) &
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+ readl(port->base + PINCTRL_IRQEN(port));
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while (irq_stat != 0) {
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int irqoffset = fls(irq_stat) - 1;
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@@ -164,8 +179,8 @@ static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port)
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ct->chip.irq_unmask = irq_gc_mask_set_bit;
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ct->chip.irq_set_type = mxs_gpio_set_irq_type;
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ct->chip.irq_set_wake = mxs_gpio_set_wake_irq;
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- ct->regs.ack = PINCTRL_IRQSTAT(port->id) + MXS_CLR;
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- ct->regs.mask = PINCTRL_IRQEN(port->id);
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+ ct->regs.ack = PINCTRL_IRQSTAT(port) + MXS_CLR;
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+ ct->regs.mask = PINCTRL_IRQEN(port);
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irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
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}
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@@ -179,6 +194,19 @@ static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
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return port->virtual_irq_start + offset;
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}
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+static struct platform_device_id mxs_gpio_ids[] = {
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+ {
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+ .name = "imx23-gpio",
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+ .driver_data = IMX23_GPIO,
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+ }, {
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+ .name = "imx28-gpio",
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+ .driver_data = IMX28_GPIO,
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+ }, {
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+ /* sentinel */
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+ }
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+};
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+MODULE_DEVICE_TABLE(platform, mxs_gpio_ids);
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+
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static int __devinit mxs_gpio_probe(struct platform_device *pdev)
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{
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static void __iomem *base;
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@@ -191,6 +219,7 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)
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return -ENOMEM;
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port->id = pdev->id;
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+ port->devid = pdev->id_entry->driver_data;
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port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32;
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port->irq = platform_get_irq(pdev, 0);
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@@ -213,11 +242,11 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)
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* select the pin interrupt functionality but initially
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* disable the interrupts
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*/
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- writel(~0U, port->base + PINCTRL_PIN2IRQ(port->id));
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- writel(0, port->base + PINCTRL_IRQEN(port->id));
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+ writel(~0U, port->base + PINCTRL_PIN2IRQ(port));
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+ writel(0, port->base + PINCTRL_IRQEN(port));
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/* clear address has to be used to clear IRQSTAT bits */
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- writel(~0U, port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR);
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+ writel(~0U, port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
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/* gpio-mxs can be a generic irq chip */
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mxs_gpio_init_gc(port);
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@@ -227,9 +256,9 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)
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irq_set_handler_data(port->irq, port);
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err = bgpio_init(&port->bgc, &pdev->dev, 4,
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- port->base + PINCTRL_DIN(port->id),
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- port->base + PINCTRL_DOUT(port->id), NULL,
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- port->base + PINCTRL_DOE(port->id), NULL, false);
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+ port->base + PINCTRL_DIN(port),
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+ port->base + PINCTRL_DOUT(port), NULL,
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+ port->base + PINCTRL_DOE(port), NULL, false);
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if (err)
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return err;
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@@ -251,6 +280,7 @@ static struct platform_driver mxs_gpio_driver = {
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.owner = THIS_MODULE,
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},
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.probe = mxs_gpio_probe,
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+ .id_table = mxs_gpio_ids,
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};
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static int __init mxs_gpio_init(void)
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