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@@ -87,17 +87,10 @@ unsigned int gic_get_int(void)
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return i;
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}
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-static unsigned int gic_irq_startup(unsigned int irq)
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+static void gic_irq_ack(struct irq_data *d)
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{
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- irq -= _irqbase;
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- pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
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- GIC_SET_INTR_MASK(irq);
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- return 0;
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-}
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+ unsigned int irq = d->irq - _irqbase;
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-static void gic_irq_ack(unsigned int irq)
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-{
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- irq -= _irqbase;
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pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
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GIC_CLR_INTR_MASK(irq);
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@@ -105,16 +98,16 @@ static void gic_irq_ack(unsigned int irq)
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GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq);
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}
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-static void gic_mask_irq(unsigned int irq)
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+static void gic_mask_irq(struct irq_data *d)
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{
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- irq -= _irqbase;
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+ unsigned int irq = d->irq - _irqbase;
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pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
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GIC_CLR_INTR_MASK(irq);
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}
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-static void gic_unmask_irq(unsigned int irq)
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+static void gic_unmask_irq(struct irq_data *d)
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{
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- irq -= _irqbase;
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+ unsigned int irq = d->irq - _irqbase;
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pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
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GIC_SET_INTR_MASK(irq);
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}
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@@ -123,13 +116,14 @@ static void gic_unmask_irq(unsigned int irq)
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static DEFINE_SPINLOCK(gic_lock);
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-static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
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+static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
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+ bool force)
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{
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+ unsigned int irq = d->irq - _irqbase;
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cpumask_t tmp = CPU_MASK_NONE;
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unsigned long flags;
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int i;
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- irq -= _irqbase;
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pr_debug("%s(%d) called\n", __func__, irq);
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cpumask_and(&tmp, cpumask, cpu_online_mask);
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if (cpus_empty(tmp))
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@@ -147,23 +141,22 @@ static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
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set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
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}
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- cpumask_copy(irq_desc[irq].affinity, cpumask);
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+ cpumask_copy(d->affinity, cpumask);
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spin_unlock_irqrestore(&gic_lock, flags);
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- return 0;
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+ return IRQ_SET_MASK_OK_NOCOPY;
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}
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#endif
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static struct irq_chip gic_irq_controller = {
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- .name = "MIPS GIC",
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- .startup = gic_irq_startup,
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- .ack = gic_irq_ack,
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- .mask = gic_mask_irq,
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- .mask_ack = gic_mask_irq,
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- .unmask = gic_unmask_irq,
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- .eoi = gic_unmask_irq,
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+ .name = "MIPS GIC",
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+ .irq_ack = gic_irq_ack,
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+ .irq_mask = gic_mask_irq,
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+ .irq_mask_ack = gic_mask_irq,
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+ .irq_unmask = gic_unmask_irq,
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+ .irq_eoi = gic_unmask_irq,
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#ifdef CONFIG_SMP
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- .set_affinity = gic_set_affinity,
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+ .irq_set_affinity = gic_set_affinity,
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#endif
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};
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