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ARM: ux500: Enable PL022 SSP Controller in Device Tree

This SSP Controller supports a number of serial communication methods
and as such cannot be registered using of_register_spi_devices.
Instead we register it simply as a primecell device.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Lee Jones 13 년 전
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2개의 변경된 파일6개의 추가작업 그리고 3개의 파일을 삭제
  1. 3 0
      arch/arm/boot/dts/db8500.dtsi
  2. 3 3
      arch/arm/mach-ux500/board-mop500.c

+ 3 - 0
arch/arm/boot/dts/db8500.dtsi

@@ -204,7 +204,10 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
+
+			// Add one of these for each child device
 			cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
+
 		};
 
 		uart@80120000 {

+ 3 - 3
arch/arm/mach-ux500/board-mop500.c

@@ -443,7 +443,7 @@ static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
 };
 #endif
 
-static struct pl022_ssp_controller ssp0_platform_data = {
+static struct pl022_ssp_controller ssp0_plat = {
 	.bus_id = 0,
 #ifdef CONFIG_STE_DMA40
 	.enable_dma = 1,
@@ -461,7 +461,7 @@ static struct pl022_ssp_controller ssp0_platform_data = {
 
 static void __init mop500_spi_init(struct device *parent)
 {
-	db8500_add_ssp0(parent, &ssp0_platform_data);
+	db8500_add_ssp0(parent, &ssp0_plat);
 }
 
 #ifdef CONFIG_STE_DMA40
@@ -749,6 +749,7 @@ struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
 	OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
 	OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
 	OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
+	OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0",  &ssp0_plat),
 	{},
 };
 
@@ -804,7 +805,6 @@ static void __init u8500_init_machine(void)
 		hrefv60_sdi_init(parent);
 	}
 	mop500_i2c_init(parent);
-	mop500_spi_init(parent);
 
 	i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
 	i2c_register_board_info(2, mop500_i2c2_devices,