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@@ -2252,6 +2252,13 @@
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#define PLL_OFF 0x2 /* Disable PLL */
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#define DF 0x1 /* Divide Frequency */
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+/* SWRST Masks */
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+#define SYSTEM_RESET 0x0007 /* Initiates A System Software Reset */
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+#define DOUBLE_FAULT 0x0008 /* Core Double Fault Causes Reset */
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+#define RESET_DOUBLE 0x2000 /* SW Reset Generated By Core Double-Fault */
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+#define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */
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+#define RESET_SOFTWARE 0x8000 /* SW Reset Occurred Since Last Read Of SWRST */
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+
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/* Bit masks for PLL_STAT */
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#define PLL_LOCKED 0x20 /* PLL Locked Status */
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