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@@ -1,88 +0,0 @@
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-/*
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- * Copyright (C) 1999, 2005 MIPS Technologies, Inc. All rights reserved.
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- *
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- * This program is free software; you can distribute it and/or modify it
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- * under the terms of the GNU General Public License (Version 2) as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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- * for more details.
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- *
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- * You should have received a copy of the GNU General Public License along
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- * with this program; if not, write to the Free Software Foundation, Inc.,
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- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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- *
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- */
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-#include <linux/init.h>
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-#include <linux/sched.h>
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-#include <linux/slab.h>
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-#include <linux/interrupt.h>
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-#include <linux/kernel_stat.h>
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-#include <asm/mips-boards/simint.h>
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-#include <asm/irq_cpu.h>
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-
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-static inline int clz(unsigned long x)
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-{
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- __asm__ (
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- " .set push \n"
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- " .set mips32 \n"
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- " clz %0, %1 \n"
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- " .set pop \n"
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- : "=r" (x)
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- : "r" (x));
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-
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- return x;
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-}
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-
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-/*
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- * Version of ffs that only looks at bits 12..15.
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- */
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-static inline unsigned int irq_ffs(unsigned int pending)
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-{
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-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
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- return -clz(pending) + 31 - CAUSEB_IP;
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-#else
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- unsigned int a0 = 7;
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- unsigned int t0;
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-
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- t0 = s0 & 0xf000;
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- t0 = t0 < 1;
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- t0 = t0 << 2;
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- a0 = a0 - t0;
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- s0 = s0 << t0;
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-
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- t0 = s0 & 0xc000;
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- t0 = t0 < 1;
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- t0 = t0 << 1;
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- a0 = a0 - t0;
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- s0 = s0 << t0;
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-
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- t0 = s0 & 0x8000;
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- t0 = t0 < 1;
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- //t0 = t0 << 2;
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- a0 = a0 - t0;
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- //s0 = s0 << t0;
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-
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- return a0;
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-#endif
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-}
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-
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-asmlinkage void plat_irq_dispatch(void)
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-{
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- unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
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- int irq;
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-
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- irq = irq_ffs(pending);
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-
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- if (irq > 0)
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- do_IRQ(MIPS_CPU_IRQ_BASE + irq);
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- else
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- spurious_interrupt();
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-}
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-
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-void __init arch_init_irq(void)
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-{
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- mips_cpu_irq_init();
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-}
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