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@@ -1120,23 +1120,23 @@ static void ath9k_hw_init_chain_masks(struct ath_hw *ah)
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static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
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enum nl80211_iftype opmode)
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{
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- ah->mask_reg = AR_IMR_TXERR |
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+ u32 imr_reg = AR_IMR_TXERR |
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AR_IMR_TXURN |
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AR_IMR_RXERR |
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AR_IMR_RXORN |
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AR_IMR_BCNMISC;
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if (ah->config.rx_intr_mitigation)
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- ah->mask_reg |= AR_IMR_RXINTM | AR_IMR_RXMINTR;
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+ imr_reg |= AR_IMR_RXINTM | AR_IMR_RXMINTR;
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else
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- ah->mask_reg |= AR_IMR_RXOK;
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+ imr_reg |= AR_IMR_RXOK;
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- ah->mask_reg |= AR_IMR_TXOK;
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+ imr_reg |= AR_IMR_TXOK;
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if (opmode == NL80211_IFTYPE_AP)
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- ah->mask_reg |= AR_IMR_MIB;
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+ imr_reg |= AR_IMR_MIB;
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- REG_WRITE(ah, AR_IMR, ah->mask_reg);
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+ REG_WRITE(ah, AR_IMR, imr_reg);
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ah->imrs2_reg |= AR_IMR_S2_GTT;
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REG_WRITE(ah, AR_IMR_S2, ah->imrs2_reg);
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@@ -2839,7 +2839,7 @@ EXPORT_SYMBOL(ath9k_hw_getisr);
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enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
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{
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- u32 omask = ah->mask_reg;
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+ enum ath9k_int omask = ah->imask;
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u32 mask, mask2;
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struct ath9k_hw_capabilities *pCap = &ah->caps;
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struct ath_common *common = ath9k_hw_common(ah);
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@@ -2911,7 +2911,6 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
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AR_IMR_S2_TSFOOR | AR_IMR_S2_GTT | AR_IMR_S2_CST);
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ah->imrs2_reg |= mask2;
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REG_WRITE(ah, AR_IMR_S2, ah->imrs2_reg);
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- ah->mask_reg = ints;
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if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
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if (ints & ATH9K_INT_TIM_TIMER)
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