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@@ -22,7 +22,6 @@
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#include "op_x86_model.h"
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#include "op_counter.h"
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-#include "../../../drivers/oprofile/cpu_buffer.h"
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#define NUM_COUNTERS 4
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#define NUM_CONTROLS 4
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@@ -61,14 +60,6 @@ static unsigned long reset_value[NUM_COUNTERS];
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#define IBS_OP_LOW_VALID_BIT (1ULL<<18) /* bit 18 */
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#define IBS_OP_LOW_ENABLE (1ULL<<17) /* bit 17 */
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-/*
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- * The function interface needs to be fixed, something like add
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- * data. Should then be added to linux/oprofile.h.
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- */
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-extern
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-void oprofile_add_data(struct op_entry *entry, struct pt_regs * const regs,
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- unsigned long pc, int code, int size);
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-
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#define IBS_FETCH_SIZE 6
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#define IBS_OP_SIZE 12
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@@ -174,16 +165,16 @@ op_amd_handle_ibs(struct pt_regs * const regs,
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rdmsr(MSR_AMD64_IBSFETCHCTL, low, high);
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if (high & IBS_FETCH_HIGH_VALID_BIT) {
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rdmsrl(MSR_AMD64_IBSFETCHLINAD, msr);
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- oprofile_add_data(&entry, regs, msr, IBS_FETCH_CODE,
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- IBS_FETCH_SIZE);
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- op_cpu_buffer_add_data(&entry, (u32)msr);
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- op_cpu_buffer_add_data(&entry, (u32)(msr >> 32));
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- op_cpu_buffer_add_data(&entry, low);
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- op_cpu_buffer_add_data(&entry, high);
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+ oprofile_write_reserve(&entry, regs, msr,
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+ IBS_FETCH_CODE, IBS_FETCH_SIZE);
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+ oprofile_add_data(&entry, (u32)msr);
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+ oprofile_add_data(&entry, (u32)(msr >> 32));
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+ oprofile_add_data(&entry, low);
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+ oprofile_add_data(&entry, high);
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rdmsrl(MSR_AMD64_IBSFETCHPHYSAD, msr);
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- op_cpu_buffer_add_data(&entry, (u32)msr);
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- op_cpu_buffer_add_data(&entry, (u32)(msr >> 32));
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- op_cpu_buffer_write_commit(&entry);
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+ oprofile_add_data(&entry, (u32)msr);
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+ oprofile_add_data(&entry, (u32)(msr >> 32));
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+ oprofile_write_commit(&entry);
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/* reenable the IRQ */
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high &= ~IBS_FETCH_HIGH_VALID_BIT;
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@@ -197,26 +188,26 @@ op_amd_handle_ibs(struct pt_regs * const regs,
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rdmsr(MSR_AMD64_IBSOPCTL, low, high);
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if (low & IBS_OP_LOW_VALID_BIT) {
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rdmsrl(MSR_AMD64_IBSOPRIP, msr);
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- oprofile_add_data(&entry, regs, msr, IBS_OP_CODE,
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- IBS_OP_SIZE);
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- op_cpu_buffer_add_data(&entry, (u32)msr);
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- op_cpu_buffer_add_data(&entry, (u32)(msr >> 32));
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+ oprofile_write_reserve(&entry, regs, msr,
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+ IBS_OP_CODE, IBS_OP_SIZE);
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+ oprofile_add_data(&entry, (u32)msr);
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+ oprofile_add_data(&entry, (u32)(msr >> 32));
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rdmsrl(MSR_AMD64_IBSOPDATA, msr);
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- op_cpu_buffer_add_data(&entry, (u32)msr);
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- op_cpu_buffer_add_data(&entry, (u32)(msr >> 32));
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+ oprofile_add_data(&entry, (u32)msr);
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+ oprofile_add_data(&entry, (u32)(msr >> 32));
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rdmsrl(MSR_AMD64_IBSOPDATA2, msr);
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- op_cpu_buffer_add_data(&entry, (u32)msr);
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- op_cpu_buffer_add_data(&entry, (u32)(msr >> 32));
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+ oprofile_add_data(&entry, (u32)msr);
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+ oprofile_add_data(&entry, (u32)(msr >> 32));
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rdmsrl(MSR_AMD64_IBSOPDATA3, msr);
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- op_cpu_buffer_add_data(&entry, (u32)msr);
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- op_cpu_buffer_add_data(&entry, (u32)(msr >> 32));
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+ oprofile_add_data(&entry, (u32)msr);
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+ oprofile_add_data(&entry, (u32)(msr >> 32));
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rdmsrl(MSR_AMD64_IBSDCLINAD, msr);
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- op_cpu_buffer_add_data(&entry, (u32)msr);
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- op_cpu_buffer_add_data(&entry, (u32)(msr >> 32));
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+ oprofile_add_data(&entry, (u32)msr);
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+ oprofile_add_data(&entry, (u32)(msr >> 32));
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rdmsrl(MSR_AMD64_IBSDCPHYSAD, msr);
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- op_cpu_buffer_add_data(&entry, (u32)msr);
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- op_cpu_buffer_add_data(&entry, (u32)(msr >> 32));
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- op_cpu_buffer_write_commit(&entry);
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+ oprofile_add_data(&entry, (u32)msr);
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+ oprofile_add_data(&entry, (u32)(msr >> 32));
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+ oprofile_write_commit(&entry);
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/* reenable the IRQ */
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high = 0;
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