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@@ -214,13 +214,16 @@ static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset,
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struct mxc_gpio_port *port =
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container_of(chip, struct mxc_gpio_port, chip);
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u32 l;
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+ unsigned long flags;
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+ spin_lock_irqsave(&port->lock, flags);
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l = __raw_readl(port->base + GPIO_GDIR);
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if (dir)
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l |= 1 << offset;
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else
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l &= ~(1 << offset);
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__raw_writel(l, port->base + GPIO_GDIR);
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+ spin_unlock_irqrestore(&port->lock, flags);
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}
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static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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@@ -229,9 +232,12 @@ static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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container_of(chip, struct mxc_gpio_port, chip);
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void __iomem *reg = port->base + GPIO_DR;
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u32 l;
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+ unsigned long flags;
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+ spin_lock_irqsave(&port->lock, flags);
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l = (__raw_readl(reg) & (~(1 << offset))) | (value << offset);
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__raw_writel(l, reg);
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+ spin_unlock_irqrestore(&port->lock, flags);
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}
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static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset)
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@@ -285,6 +291,8 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
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port[i].chip.base = i * 32;
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port[i].chip.ngpio = 32;
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+ spin_lock_init(&port[i].lock);
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+
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/* its a serious configuration bug when it fails */
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BUG_ON( gpiochip_add(&port[i].chip) < 0 );
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