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@@ -150,8 +150,7 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
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{
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{
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void __iomem *base = mipi->base;
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void __iomem *base = mipi->base;
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struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
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struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
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- u32 pctype, datatype, pixfmt;
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- u32 linelength;
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+ u32 pctype, datatype, pixfmt, linelength, vmctr2 = 0x00e00000;
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bool yuv;
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bool yuv;
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/*
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/*
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@@ -308,17 +307,24 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
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*/
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*/
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iowrite32(0x00000006, mipi->linkbase + DTCTR);
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iowrite32(0x00000006, mipi->linkbase + DTCTR);
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/* VSYNC width = 2 (<< 17) */
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/* VSYNC width = 2 (<< 17) */
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- iowrite32(0x00040000 | (pctype << 12) | datatype,
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+ iowrite32((ch->lcd_cfg[0].vsync_len << pdata->vsynw_offset) |
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+ (pdata->clksrc << 16) | (pctype << 12) | datatype,
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mipi->linkbase + VMCTR1);
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mipi->linkbase + VMCTR1);
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+
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/*
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/*
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* Non-burst mode with sync pulses: VSE and HSE are output,
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* Non-burst mode with sync pulses: VSE and HSE are output,
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* HSA period allowed, no commands in LP
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* HSA period allowed, no commands in LP
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*/
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*/
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- iowrite32(0x00e00000, mipi->linkbase + VMCTR2);
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+ if (pdata->flags & SH_MIPI_DSI_HSABM)
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+ vmctr2 |= 0x20;
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+ if (pdata->flags & SH_MIPI_DSI_HSPBM)
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+ vmctr2 |= 0x10;
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+ iowrite32(vmctr2, mipi->linkbase + VMCTR2);
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+
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/*
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/*
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* 0x660 = 1632 bytes per line (RGB24, 544 pixels: see
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* 0x660 = 1632 bytes per line (RGB24, 544 pixels: see
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* sh_mobile_lcdc_info.ch[0].lcd_cfg[0].xres), HSALEN = 1 - default
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* sh_mobile_lcdc_info.ch[0].lcd_cfg[0].xres), HSALEN = 1 - default
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- * (unused, since VMCTR2[HSABM] = 0)
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+ * (unused if VMCTR2[HSABM] = 0)
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*/
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*/
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iowrite32(1 | (linelength << 16), mipi->linkbase + VMLEN1);
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iowrite32(1 | (linelength << 16), mipi->linkbase + VMLEN1);
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