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@@ -1894,6 +1894,8 @@ static const char *pp_lib_thermal_controller_names[] = {
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"emc2103",
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"Sumo",
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"Northern Islands",
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+ "Southern Islands",
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+ "lm96163",
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};
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union power_info {
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@@ -1910,6 +1912,7 @@ union pplib_clock_info {
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struct _ATOM_PPLIB_RS780_CLOCK_INFO rs780;
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struct _ATOM_PPLIB_EVERGREEN_CLOCK_INFO evergreen;
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struct _ATOM_PPLIB_SUMO_CLOCK_INFO sumo;
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+ struct _ATOM_PPLIB_SI_CLOCK_INFO si;
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};
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union pplib_power_state {
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@@ -2167,6 +2170,11 @@ static void radeon_atombios_add_pplib_thermal_controller(struct radeon_device *r
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(controller->ucFanParameters &
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ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
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rdev->pm.int_thermal_type = THERMAL_TYPE_NI;
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+ } else if (controller->ucType == ATOM_PP_THERMALCONTROLLER_SISLANDS) {
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+ DRM_INFO("Internal thermal controller %s fan control\n",
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+ (controller->ucFanParameters &
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+ ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
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+ rdev->pm.int_thermal_type = THERMAL_TYPE_SI;
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} else if ((controller->ucType ==
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ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO) ||
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(controller->ucType ==
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@@ -2299,6 +2307,19 @@ static bool radeon_atombios_parse_pplib_clock_info(struct radeon_device *rdev,
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sclk |= clock_info->rs780.ucLowEngineClockHigh << 16;
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rdev->pm.power_state[state_index].clock_info[mode_index].sclk = sclk;
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}
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+ } else if (ASIC_IS_DCE6(rdev)) {
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+ sclk = le16_to_cpu(clock_info->si.usEngineClockLow);
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+ sclk |= clock_info->si.ucEngineClockHigh << 16;
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+ mclk = le16_to_cpu(clock_info->si.usMemoryClockLow);
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+ mclk |= clock_info->si.ucMemoryClockHigh << 16;
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+ rdev->pm.power_state[state_index].clock_info[mode_index].mclk = mclk;
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+ rdev->pm.power_state[state_index].clock_info[mode_index].sclk = sclk;
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+ rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type =
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+ VOLTAGE_SW;
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+ rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage =
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+ le16_to_cpu(clock_info->si.usVDDC);
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+ rdev->pm.power_state[state_index].clock_info[mode_index].voltage.vddci =
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+ le16_to_cpu(clock_info->si.usVDDCI);
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} else if (ASIC_IS_DCE4(rdev)) {
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sclk = le16_to_cpu(clock_info->evergreen.usEngineClockLow);
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sclk |= clock_info->evergreen.ucEngineClockHigh << 16;
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