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@@ -59,6 +59,12 @@
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#include <plat/mci.h>
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#include <plat/ts.h>
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+#define H1940_LATCH ((void __force __iomem *)0xF8000000)
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+
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+#define H1940_PA_LATCH S3C2410_CS2
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+
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+#define H1940_LATCH_BIT(x) (1 << ((x) + 16 - S3C_GPIO_END))
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+
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static struct map_desc h1940_iodesc[] __initdata = {
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[0] = {
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.virtual = (unsigned long)H1940_LATCH,
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@@ -100,9 +106,16 @@ static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = {
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/* Board control latch control */
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-static unsigned int latch_state = H1940_LATCH_DEFAULT;
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+static unsigned int latch_state = H1940_LATCH_BIT(H1940_LATCH_LCD_P4) |
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+ H1940_LATCH_BIT(H1940_LATCH_SM803_ENABLE) |
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+ H1940_LATCH_BIT(H1940_LATCH_SDQ1) |
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+ H1940_LATCH_BIT(H1940_LATCH_LCD_P1) |
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+ H1940_LATCH_BIT(H1940_LATCH_LCD_P2) |
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+ H1940_LATCH_BIT(H1940_LATCH_LCD_P3) |
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+ H1940_LATCH_BIT(H1940_LATCH_MAX1698_nSHUTDOWN) |
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+ H1940_LATCH_BIT(H1940_LATCH_CPUQ5);
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-void h1940_latch_control(unsigned int clear, unsigned int set)
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+static void h1940_latch_control(unsigned int clear, unsigned int set)
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{
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unsigned long flags;
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@@ -116,7 +129,42 @@ void h1940_latch_control(unsigned int clear, unsigned int set)
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local_irq_restore(flags);
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}
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-EXPORT_SYMBOL_GPL(h1940_latch_control);
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+static inline int h1940_gpiolib_to_latch(int offset)
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+{
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+ return 1 << (offset + 16);
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+}
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+
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+static void h1940_gpiolib_latch_set(struct gpio_chip *chip,
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+ unsigned offset, int value)
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+{
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+ int latch_bit = h1940_gpiolib_to_latch(offset);
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+
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+ h1940_latch_control(value ? 0 : latch_bit,
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+ value ? latch_bit : 0);
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+}
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+
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+static int h1940_gpiolib_latch_output(struct gpio_chip *chip,
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+ unsigned offset, int value)
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+{
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+ h1940_gpiolib_latch_set(chip, offset, value);
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+ return 0;
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+}
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+
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+static int h1940_gpiolib_latch_get(struct gpio_chip *chip,
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+ unsigned offset)
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+{
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+ return (latch_state >> (offset + 16)) & 1;
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+}
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+
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+struct gpio_chip h1940_latch_gpiochip = {
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+ .base = H1940_LATCH_GPIO(0),
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+ .owner = THIS_MODULE,
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+ .label = "H1940_LATCH",
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+ .ngpio = 16,
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+ .direction_output = h1940_gpiolib_latch_output,
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+ .set = h1940_gpiolib_latch_set,
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+ .get = h1940_gpiolib_latch_get,
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+};
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static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd)
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{
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@@ -125,10 +173,10 @@ static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd)
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switch (cmd)
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{
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case S3C2410_UDC_P_ENABLE :
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- h1940_latch_control(0, H1940_LATCH_USB_DP);
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+ gpio_set_value(H1940_LATCH_USB_DP, 1);
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break;
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case S3C2410_UDC_P_DISABLE :
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- h1940_latch_control(H1940_LATCH_USB_DP, 0);
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+ gpio_set_value(H1940_LATCH_USB_DP, 0);
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break;
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case S3C2410_UDC_P_RESET :
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break;
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@@ -303,6 +351,8 @@ static void __init h1940_map_io(void)
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memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
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#endif
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s3c_pm_init();
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+
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+ WARN_ON(gpiochip_add(&h1940_latch_gpiochip));
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}
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/* H1940 and RX3715 need to reserve this for suspend */
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@@ -342,9 +392,11 @@ static void __init h1940_init(void)
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gpio_request(S3C2410_GPC(0), "LCD power");
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gpio_request(S3C2410_GPC(5), "LCD power");
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gpio_request(S3C2410_GPC(6), "LCD power");
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-
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gpio_direction_input(S3C2410_GPC(6));
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+ gpio_request(H1940_LATCH_USB_DP, "USB pullup");
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+ gpio_direction_output(H1940_LATCH_USB_DP, 0);
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+
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platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices));
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}
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