|
@@ -184,14 +184,14 @@ int arch_install_hw_breakpoint(struct perf_event *bp)
|
|
|
/* Breakpoint */
|
|
|
ctrl_reg = AARCH64_DBG_REG_BCR;
|
|
|
val_reg = AARCH64_DBG_REG_BVR;
|
|
|
- slots = __get_cpu_var(bp_on_reg);
|
|
|
+ slots = this_cpu_ptr(bp_on_reg);
|
|
|
max_slots = core_num_brps;
|
|
|
reg_enable = !debug_info->bps_disabled;
|
|
|
} else {
|
|
|
/* Watchpoint */
|
|
|
ctrl_reg = AARCH64_DBG_REG_WCR;
|
|
|
val_reg = AARCH64_DBG_REG_WVR;
|
|
|
- slots = __get_cpu_var(wp_on_reg);
|
|
|
+ slots = this_cpu_ptr(wp_on_reg);
|
|
|
max_slots = core_num_wrps;
|
|
|
reg_enable = !debug_info->wps_disabled;
|
|
|
}
|
|
@@ -230,12 +230,12 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp)
|
|
|
if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) {
|
|
|
/* Breakpoint */
|
|
|
base = AARCH64_DBG_REG_BCR;
|
|
|
- slots = __get_cpu_var(bp_on_reg);
|
|
|
+ slots = this_cpu_ptr(bp_on_reg);
|
|
|
max_slots = core_num_brps;
|
|
|
} else {
|
|
|
/* Watchpoint */
|
|
|
base = AARCH64_DBG_REG_WCR;
|
|
|
- slots = __get_cpu_var(wp_on_reg);
|
|
|
+ slots = this_cpu_ptr(wp_on_reg);
|
|
|
max_slots = core_num_wrps;
|
|
|
}
|
|
|
|
|
@@ -505,11 +505,11 @@ static void toggle_bp_registers(int reg, enum debug_el el, int enable)
|
|
|
|
|
|
switch (reg) {
|
|
|
case AARCH64_DBG_REG_BCR:
|
|
|
- slots = __get_cpu_var(bp_on_reg);
|
|
|
+ slots = this_cpu_ptr(bp_on_reg);
|
|
|
max_slots = core_num_brps;
|
|
|
break;
|
|
|
case AARCH64_DBG_REG_WCR:
|
|
|
- slots = __get_cpu_var(wp_on_reg);
|
|
|
+ slots = this_cpu_ptr(wp_on_reg);
|
|
|
max_slots = core_num_wrps;
|
|
|
break;
|
|
|
default:
|
|
@@ -546,7 +546,7 @@ static int breakpoint_handler(unsigned long unused, unsigned int esr,
|
|
|
struct debug_info *debug_info;
|
|
|
struct arch_hw_breakpoint_ctrl ctrl;
|
|
|
|
|
|
- slots = (struct perf_event **)__get_cpu_var(bp_on_reg);
|
|
|
+ slots = this_cpu_ptr(bp_on_reg);
|
|
|
addr = instruction_pointer(regs);
|
|
|
debug_info = ¤t->thread.debug;
|
|
|
|
|
@@ -596,7 +596,7 @@ unlock:
|
|
|
user_enable_single_step(current);
|
|
|
} else {
|
|
|
toggle_bp_registers(AARCH64_DBG_REG_BCR, DBG_ACTIVE_EL1, 0);
|
|
|
- kernel_step = &__get_cpu_var(stepping_kernel_bp);
|
|
|
+ kernel_step = this_cpu_ptr(&stepping_kernel_bp);
|
|
|
|
|
|
if (*kernel_step != ARM_KERNEL_STEP_NONE)
|
|
|
return 0;
|
|
@@ -623,7 +623,7 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr,
|
|
|
struct arch_hw_breakpoint *info;
|
|
|
struct arch_hw_breakpoint_ctrl ctrl;
|
|
|
|
|
|
- slots = (struct perf_event **)__get_cpu_var(wp_on_reg);
|
|
|
+ slots = this_cpu_ptr(wp_on_reg);
|
|
|
debug_info = ¤t->thread.debug;
|
|
|
|
|
|
for (i = 0; i < core_num_wrps; ++i) {
|
|
@@ -698,7 +698,7 @@ unlock:
|
|
|
user_enable_single_step(current);
|
|
|
} else {
|
|
|
toggle_bp_registers(AARCH64_DBG_REG_WCR, DBG_ACTIVE_EL1, 0);
|
|
|
- kernel_step = &__get_cpu_var(stepping_kernel_bp);
|
|
|
+ kernel_step = this_cpu_ptr(&stepping_kernel_bp);
|
|
|
|
|
|
if (*kernel_step != ARM_KERNEL_STEP_NONE)
|
|
|
return 0;
|
|
@@ -722,7 +722,7 @@ int reinstall_suspended_bps(struct pt_regs *regs)
|
|
|
struct debug_info *debug_info = ¤t->thread.debug;
|
|
|
int handled_exception = 0, *kernel_step;
|
|
|
|
|
|
- kernel_step = &__get_cpu_var(stepping_kernel_bp);
|
|
|
+ kernel_step = this_cpu_ptr(&stepping_kernel_bp);
|
|
|
|
|
|
/*
|
|
|
* Called from single-step exception handler.
|