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@@ -26,6 +26,7 @@
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* We avoid flushing the pinned 0, 1 and possibly 2 entries.
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*/
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.globl _tlbia;
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+.type _tlbia, @function
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.align 4;
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_tlbia:
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addik r12, r0, 63 /* flush all entries (63 - 3) */
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@@ -41,11 +42,13 @@ _tlbia_1:
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/* sync */
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rtsd r15, 8
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nop
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+ .size _tlbia, . - _tlbia
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/*
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* Flush MMU TLB for a particular address (in r5)
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*/
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.globl _tlbie;
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+.type _tlbie, @function
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.align 4;
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_tlbie:
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mts rtlbsx, r5 /* look up the address in TLB */
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@@ -59,10 +62,13 @@ _tlbie_1:
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rtsd r15, 8
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nop
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+ .size _tlbie, . - _tlbie
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+
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/*
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* Allocate TLB entry for early console
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*/
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.globl early_console_reg_tlb_alloc;
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+.type early_console_reg_tlb_alloc, @function
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.align 4;
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early_console_reg_tlb_alloc:
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/*
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@@ -86,6 +92,8 @@ early_console_reg_tlb_alloc:
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rtsd r15, 8
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nop
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+ .size early_console_reg_tlb_alloc, . - early_console_reg_tlb_alloc
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+
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/*
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* Copy a whole page (4096 bytes).
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*/
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@@ -104,6 +112,7 @@ early_console_reg_tlb_alloc:
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#define DCACHE_LINE_BYTES (4 * 4)
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.globl copy_page;
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+.type copy_page, @function
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.align 4;
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copy_page:
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ori r11, r0, (PAGE_SIZE/DCACHE_LINE_BYTES) - 1
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@@ -118,3 +127,5 @@ _copy_page_loop:
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addik r11, r11, -1
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rtsd r15, 8
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nop
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+
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+ .size copy_page, . - copy_page
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