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@@ -60,14 +60,10 @@ EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);
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__u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata;
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static int cachesize_override __cpuinitdata = -1;
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-static int disable_x86_fxsr __cpuinitdata;
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static int disable_x86_serial_nr __cpuinitdata = 1;
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-static int disable_x86_sep __cpuinitdata;
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struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {};
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-extern int disable_pse;
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-
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static void __cpuinit default_init(struct cpuinfo_x86 * c)
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{
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/* Not much we can do here... */
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@@ -216,16 +212,8 @@ static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c, int early)
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static int __init x86_fxsr_setup(char * s)
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{
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- /* Tell all the other CPUs to not use it... */
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- disable_x86_fxsr = 1;
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-
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- /*
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- * ... and clear the bits early in the boot_cpu_data
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- * so that the bootup process doesn't try to do this
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- * either.
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- */
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- clear_bit(X86_FEATURE_FXSR, boot_cpu_data.x86_capability);
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- clear_bit(X86_FEATURE_XMM, boot_cpu_data.x86_capability);
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+ setup_clear_cpu_cap(X86_FEATURE_FXSR);
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+ setup_clear_cpu_cap(X86_FEATURE_XMM);
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return 1;
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}
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__setup("nofxsr", x86_fxsr_setup);
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@@ -233,7 +221,7 @@ __setup("nofxsr", x86_fxsr_setup);
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static int __init x86_sep_setup(char * s)
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{
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- disable_x86_sep = 1;
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+ setup_clear_cpu_cap(X86_FEATURE_SEP);
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return 1;
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}
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__setup("nosep", x86_sep_setup);
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@@ -462,19 +450,6 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
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if ( tsc_disable )
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clear_bit(X86_FEATURE_TSC, c->x86_capability);
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- /* FXSR disabled? */
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- if (disable_x86_fxsr) {
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- clear_bit(X86_FEATURE_FXSR, c->x86_capability);
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- clear_bit(X86_FEATURE_XMM, c->x86_capability);
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- }
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-
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- /* SEP disabled? */
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- if (disable_x86_sep)
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- clear_bit(X86_FEATURE_SEP, c->x86_capability);
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-
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- if (disable_pse)
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- clear_bit(X86_FEATURE_PSE, c->x86_capability);
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-
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/* If the model name is still unset, do table lookup. */
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if ( !c->x86_model_id[0] ) {
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char *p;
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@@ -629,8 +604,7 @@ void __init early_cpu_init(void)
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/* pse is not compatible with on-the-fly unmapping,
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* disable it even if the cpus claim to support it.
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*/
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- clear_bit(X86_FEATURE_PSE, boot_cpu_data.x86_capability);
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- disable_pse = 1;
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+ setup_clear_cpu_cap(X86_FEATURE_PSE);
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#endif
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}
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