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@@ -73,6 +73,7 @@
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/* DAVINCI_MMCCTL definitions */
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/* DAVINCI_MMCCTL definitions */
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#define MMCCTL_DATRST (1 << 0)
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#define MMCCTL_DATRST (1 << 0)
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#define MMCCTL_CMDRST (1 << 1)
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#define MMCCTL_CMDRST (1 << 1)
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+#define MMCCTL_WIDTH_8_BIT (1 << 8)
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#define MMCCTL_WIDTH_4_BIT (1 << 2)
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#define MMCCTL_WIDTH_4_BIT (1 << 2)
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#define MMCCTL_DATEG_DISABLED (0 << 6)
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#define MMCCTL_DATEG_DISABLED (0 << 6)
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#define MMCCTL_DATEG_RISING (1 << 6)
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#define MMCCTL_DATEG_RISING (1 << 6)
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@@ -791,22 +792,42 @@ static void calculate_clk_divider(struct mmc_host *mmc, struct mmc_ios *ios)
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static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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{
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{
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- unsigned int mmc_pclk = 0;
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struct mmc_davinci_host *host = mmc_priv(mmc);
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struct mmc_davinci_host *host = mmc_priv(mmc);
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- mmc_pclk = host->mmc_input_clk;
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dev_dbg(mmc_dev(host->mmc),
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dev_dbg(mmc_dev(host->mmc),
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"clock %dHz busmode %d powermode %d Vdd %04x\n",
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"clock %dHz busmode %d powermode %d Vdd %04x\n",
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ios->clock, ios->bus_mode, ios->power_mode,
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ios->clock, ios->bus_mode, ios->power_mode,
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ios->vdd);
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ios->vdd);
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- if (ios->bus_width == MMC_BUS_WIDTH_4) {
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- dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n");
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- writel(readl(host->base + DAVINCI_MMCCTL) | MMCCTL_WIDTH_4_BIT,
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- host->base + DAVINCI_MMCCTL);
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- } else {
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- dev_dbg(mmc_dev(host->mmc), "Disabling 4 bit mode\n");
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- writel(readl(host->base + DAVINCI_MMCCTL) & ~MMCCTL_WIDTH_4_BIT,
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+
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+ switch (ios->bus_width) {
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+ case MMC_BUS_WIDTH_8:
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+ dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n");
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+ writel((readl(host->base + DAVINCI_MMCCTL) &
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+ ~MMCCTL_WIDTH_4_BIT) | MMCCTL_WIDTH_8_BIT,
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host->base + DAVINCI_MMCCTL);
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host->base + DAVINCI_MMCCTL);
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+ break;
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+ case MMC_BUS_WIDTH_4:
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+ dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n");
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+ if (host->version == MMC_CTLR_VERSION_2)
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+ writel((readl(host->base + DAVINCI_MMCCTL) &
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+ ~MMCCTL_WIDTH_8_BIT) | MMCCTL_WIDTH_4_BIT,
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+ host->base + DAVINCI_MMCCTL);
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+ else
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+ writel(readl(host->base + DAVINCI_MMCCTL) |
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+ MMCCTL_WIDTH_4_BIT,
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+ host->base + DAVINCI_MMCCTL);
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+ break;
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+ case MMC_BUS_WIDTH_1:
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+ dev_dbg(mmc_dev(host->mmc), "Enabling 1 bit mode\n");
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+ if (host->version == MMC_CTLR_VERSION_2)
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+ writel(readl(host->base + DAVINCI_MMCCTL) &
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+ ~(MMCCTL_WIDTH_8_BIT | MMCCTL_WIDTH_4_BIT),
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+ host->base + DAVINCI_MMCCTL);
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+ else
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+ writel(readl(host->base + DAVINCI_MMCCTL) &
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+ ~MMCCTL_WIDTH_4_BIT,
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+ host->base + DAVINCI_MMCCTL);
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+ break;
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}
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}
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calculate_clk_divider(mmc, ios);
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calculate_clk_divider(mmc, ios);
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@@ -1189,10 +1210,14 @@ static int __init davinci_mmcsd_probe(struct platform_device *pdev)
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/* REVISIT: someday, support IRQ-driven card detection. */
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/* REVISIT: someday, support IRQ-driven card detection. */
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mmc->caps |= MMC_CAP_NEEDS_POLL;
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mmc->caps |= MMC_CAP_NEEDS_POLL;
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+ mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
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- if (!pdata || pdata->wires == 4 || pdata->wires == 0)
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+ if (pdata && (pdata->wires == 4 || pdata->wires == 0))
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mmc->caps |= MMC_CAP_4_BIT_DATA;
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mmc->caps |= MMC_CAP_4_BIT_DATA;
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+ if (pdata && (pdata->wires == 8))
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+ mmc->caps |= (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA);
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+
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host->version = pdata->version;
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host->version = pdata->version;
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mmc->ops = &mmc_davinci_ops;
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mmc->ops = &mmc_davinci_ops;
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