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@@ -49,9 +49,6 @@ static cycle_t read_hrt(struct clocksource *cs)
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return (cycle_t) inl(scx200_cb_base + SCx200_TIMER_OFFSET);
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}
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-#define HRT_SHIFT_1 22
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-#define HRT_SHIFT_27 26
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-
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static struct clocksource cs_hrt = {
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.name = "scx200_hrt",
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.rating = 250,
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@@ -63,6 +60,7 @@ static struct clocksource cs_hrt = {
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static int __init init_hrt_clocksource(void)
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{
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+ u32 freq;
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/* Make sure scx200 has initialized the configuration block */
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if (!scx200_cb_present())
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return -ENODEV;
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@@ -79,19 +77,15 @@ static int __init init_hrt_clocksource(void)
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outb(HR_TMEN | (mhz27 ? HR_TMCLKSEL : 0),
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scx200_cb_base + SCx200_TMCNFG_OFFSET);
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- if (mhz27) {
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- cs_hrt.shift = HRT_SHIFT_27;
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- cs_hrt.mult = clocksource_hz2mult((HRT_FREQ + ppm) * 27,
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- cs_hrt.shift);
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- } else {
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- cs_hrt.shift = HRT_SHIFT_1;
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- cs_hrt.mult = clocksource_hz2mult(HRT_FREQ + ppm,
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- cs_hrt.shift);
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- }
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+ freq = (HRT_FREQ + ppm);
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+ if (mhz27)
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+ freq *= 27;
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+
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pr_info("enabling scx200 high-res timer (%s MHz +%d ppm)\n",
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+ printk(KERN_INFO "enabling scx200 high-res timer (%s MHz +%d ppm)\n",
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mhz27 ? "27":"1", ppm);
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- return clocksource_register(&cs_hrt);
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+ return clocksource_register_hz(&cs_hrt, freq);
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}
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module_init(init_hrt_clocksource);
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