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@@ -14,6 +14,14 @@
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compatible = "renesas,emev2";
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interrupt-parent = <&gic>;
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+ aliases {
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+ gpio0 = &gpio0;
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+ gpio1 = &gpio1;
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+ gpio2 = &gpio2;
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+ gpio3 = &gpio3;
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+ gpio4 = &gpio4;
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+ };
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+
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@@ -67,4 +75,55 @@
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reg = <0xe1050000 0x38>;
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interrupts = <0 11 0>;
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};
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+
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+ gpio0: gpio@e0050000 {
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+ compatible = "renesas,em-gio";
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+ reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
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+ interrupts = <0 67 0>, <0 68 0>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ ngpios = <32>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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+ gpio1: gpio@e0050080 {
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+ compatible = "renesas,em-gio";
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+ reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
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+ interrupts = <0 69 0>, <0 70 0>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ ngpios = <32>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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+ gpio2: gpio@e0050100 {
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+ compatible = "renesas,em-gio";
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+ reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
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+ interrupts = <0 71 0>, <0 72 0>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ ngpios = <32>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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+ gpio3: gpio@e0050180 {
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+ compatible = "renesas,em-gio";
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+ reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
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+ interrupts = <0 73 0>, <0 74 0>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ ngpios = <32>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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+ gpio4: gpio@e0050200 {
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+ compatible = "renesas,em-gio";
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+ reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
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+ interrupts = <0 75 0>, <0 76 0>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ ngpios = <31>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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};
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