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@@ -315,6 +315,10 @@ bnx2_enable_int(struct bnx2 *bp)
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{
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u32 val;
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+ REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
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+ BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |
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+ BNX2_PCICFG_INT_ACK_CMD_MASK_INT | bp->last_status_idx);
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+
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REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
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BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | bp->last_status_idx);
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@@ -1892,9 +1896,20 @@ bnx2_poll(struct net_device *dev, int *budget)
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if (!bnx2_has_work(bp)) {
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netif_rx_complete(dev);
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+ if (likely(bp->flags & USING_MSI_FLAG)) {
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+ REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
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+ BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |
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+ bp->last_status_idx);
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+ return 0;
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+ }
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+ REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
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+ BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |
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+ BNX2_PCICFG_INT_ACK_CMD_MASK_INT |
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+ bp->last_status_idx);
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+
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REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
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- BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |
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- bp->last_status_idx);
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+ BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |
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+ bp->last_status_idx);
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return 0;
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}
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