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@@ -479,7 +479,7 @@ config SH_CLK_MD
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int "CPU Mode Pin Setting"
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int "CPU Mode Pin Setting"
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depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
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depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
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help
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help
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- MD2 - MD0 Setting.
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+ MD2 - MD0 pin setting.
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menu "CPU Frequency scaling"
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menu "CPU Frequency scaling"
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@@ -580,18 +580,6 @@ config NR_CPUS
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source "kernel/Kconfig.preempt"
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source "kernel/Kconfig.preempt"
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-config CPU_HAS_SR_RB
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- bool "CPU has SR.RB"
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- depends on CPU_SH3 || CPU_SH4
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- default y
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- help
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- This will enable the use of SR.RB register bank usage. Processors
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- that are lacking this bit must have another method in place for
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- accomplishing what is taken care of by the banked registers.
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-
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- See <file:Documentation/sh/register-banks.txt> for further
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- information on SR.RB and register banking in the kernel in general.
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-
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config NODES_SHIFT
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config NODES_SHIFT
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int
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int
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default "1"
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default "1"
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