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+<?xml version="1.0" encoding="UTF-8"?>
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+<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
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+ "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
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+
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+<book id="Generic-IRQ-Guide">
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+ <bookinfo>
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+ <title>Linux generic IRQ handling</title>
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+
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+ <authorgroup>
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+ <author>
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+ <firstname>Thomas</firstname>
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+ <surname>Gleixner</surname>
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+ <affiliation>
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+ <address>
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+ <email>tglx@linutronix.de</email>
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+ </address>
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+ </affiliation>
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+ </author>
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+ <author>
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+ <firstname>Ingo</firstname>
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+ <surname>Molnar</surname>
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+ <affiliation>
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+ <address>
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+ <email>mingo@elte.hu</email>
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+ </address>
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+ </affiliation>
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+ </author>
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+ </authorgroup>
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+
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+ <copyright>
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+ <year>2005-2006</year>
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+ <holder>Thomas Gleixner</holder>
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+ </copyright>
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+ <copyright>
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+ <year>2005-2006</year>
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+ <holder>Ingo Molnar</holder>
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+ </copyright>
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+
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+ <legalnotice>
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+ <para>
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+ This documentation is free software; you can redistribute
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+ it and/or modify it under the terms of the GNU General Public
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+ License version 2 as published by the Free Software Foundation.
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+ </para>
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+
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+ <para>
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+ This program is distributed in the hope that it will be
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+ useful, but WITHOUT ANY WARRANTY; without even the implied
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+ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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+ See the GNU General Public License for more details.
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+ </para>
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+
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+ <para>
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+ You should have received a copy of the GNU General Public
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+ License along with this program; if not, write to the Free
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+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ MA 02111-1307 USA
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+ </para>
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+
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+ <para>
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+ For more details see the file COPYING in the source
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+ distribution of Linux.
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+ </para>
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+ </legalnotice>
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+ </bookinfo>
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+
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+<toc></toc>
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+
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+ <chapter id="intro">
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+ <title>Introduction</title>
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+ <para>
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+ The generic interrupt handling layer is designed to provide a
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+ complete abstraction of interrupt handling for device drivers.
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+ It is able to handle all the different types of interrupt controller
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+ hardware. Device drivers use generic API functions to request, enable,
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+ disable and free interrupts. The drivers do not have to know anything
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+ about interrupt hardware details, so they can be used on different
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+ platforms without code changes.
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+ </para>
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+ <para>
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+ This documentation is provided to developers who want to implement
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+ an interrupt subsystem based for their architecture, with the help
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+ of the generic IRQ handling layer.
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+ </para>
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+ </chapter>
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+
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+ <chapter id="rationale">
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+ <title>Rationale</title>
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+ <para>
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+ The original implementation of interrupt handling in Linux is using
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+ the __do_IRQ() super-handler, which is able to deal with every
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+ type of interrupt logic.
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+ </para>
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+ <para>
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+ Originally, Russell King identified different types of handlers to
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+ build a quite universal set for the ARM interrupt handler
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+ implementation in Linux 2.5/2.6. He distinguished between:
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+ <itemizedlist>
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+ <listitem><para>Level type</para></listitem>
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+ <listitem><para>Edge type</para></listitem>
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+ <listitem><para>Simple type</para></listitem>
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+ </itemizedlist>
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+ In the SMP world of the __do_IRQ() super-handler another type
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+ was identified:
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+ <itemizedlist>
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+ <listitem><para>Per CPU type</para></listitem>
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+ </itemizedlist>
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+ </para>
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+ <para>
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+ This split implementation of highlevel IRQ handlers allows us to
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+ optimize the flow of the interrupt handling for each specific
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+ interrupt type. This reduces complexity in that particular codepath
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+ and allows the optimized handling of a given type.
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+ </para>
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+ <para>
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+ The original general IRQ implementation used hw_interrupt_type
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+ structures and their ->ack(), ->end() [etc.] callbacks to
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+ differentiate the flow control in the super-handler. This leads to
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+ a mix of flow logic and lowlevel hardware logic, and it also leads
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+ to unnecessary code duplication: for example in i386, there is a
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+ ioapic_level_irq and a ioapic_edge_irq irq-type which share many
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+ of the lowlevel details but have different flow handling.
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+ </para>
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+ <para>
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+ A more natural abstraction is the clean separation of the
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+ 'irq flow' and the 'chip details'.
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+ </para>
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+ <para>
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+ Analysing a couple of architecture's IRQ subsystem implementations
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+ reveals that most of them can use a generic set of 'irq flow'
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+ methods and only need to add the chip level specific code.
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+ The separation is also valuable for (sub)architectures
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+ which need specific quirks in the irq flow itself but not in the
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+ chip-details - and thus provides a more transparent IRQ subsystem
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+ design.
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+ </para>
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+ <para>
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+ Each interrupt descriptor is assigned its own highlevel flow
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+ handler, which is normally one of the generic
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+ implementations. (This highlevel flow handler implementation also
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+ makes it simple to provide demultiplexing handlers which can be
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+ found in embedded platforms on various architectures.)
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+ </para>
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+ <para>
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+ The separation makes the generic interrupt handling layer more
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+ flexible and extensible. For example, an (sub)architecture can
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+ use a generic irq-flow implementation for 'level type' interrupts
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+ and add a (sub)architecture specific 'edge type' implementation.
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+ </para>
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+ <para>
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+ To make the transition to the new model easier and prevent the
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+ breakage of existing implementations, the __do_IRQ() super-handler
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+ is still available. This leads to a kind of duality for the time
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+ being. Over time the new model should be used in more and more
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+ architectures, as it enables smaller and cleaner IRQ subsystems.
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+ </para>
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+ </chapter>
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+ <chapter id="bugs">
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+ <title>Known Bugs And Assumptions</title>
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+ <para>
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+ None (knock on wood).
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+ </para>
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+ </chapter>
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+
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+ <chapter id="Abstraction">
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+ <title>Abstraction layers</title>
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+ <para>
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+ There are three main levels of abstraction in the interrupt code:
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+ <orderedlist>
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+ <listitem><para>Highlevel driver API</para></listitem>
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+ <listitem><para>Highlevel IRQ flow handlers</para></listitem>
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+ <listitem><para>Chiplevel hardware encapsulation</para></listitem>
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+ </orderedlist>
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+ </para>
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+ <sect1>
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+ <title>Interrupt control flow</title>
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+ <para>
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+ Each interrupt is described by an interrupt descriptor structure
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+ irq_desc. The interrupt is referenced by an 'unsigned int' numeric
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+ value which selects the corresponding interrupt decription structure
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+ in the descriptor structures array.
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+ The descriptor structure contains status information and pointers
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+ to the interrupt flow method and the interrupt chip structure
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+ which are assigned to this interrupt.
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+ </para>
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+ <para>
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+ Whenever an interrupt triggers, the lowlevel arch code calls into
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+ the generic interrupt code by calling desc->handle_irq().
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+ This highlevel IRQ handling function only uses desc->chip primitives
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+ referenced by the assigned chip descriptor structure.
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+ </para>
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+ </sect1>
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+ <sect1>
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+ <title>Highlevel Driver API</title>
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+ <para>
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+ The highlevel Driver API consists of following functions:
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+ <itemizedlist>
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+ <listitem><para>request_irq()</para></listitem>
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+ <listitem><para>free_irq()</para></listitem>
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+ <listitem><para>disable_irq()</para></listitem>
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+ <listitem><para>enable_irq()</para></listitem>
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+ <listitem><para>disable_irq_nosync() (SMP only)</para></listitem>
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+ <listitem><para>synchronize_irq() (SMP only)</para></listitem>
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+ <listitem><para>set_irq_type()</para></listitem>
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+ <listitem><para>set_irq_wake()</para></listitem>
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+ <listitem><para>set_irq_data()</para></listitem>
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+ <listitem><para>set_irq_chip()</para></listitem>
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+ <listitem><para>set_irq_chip_data()</para></listitem>
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+ </itemizedlist>
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+ See the autogenerated function documentation for details.
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+ </para>
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+ </sect1>
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+ <sect1>
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+ <title>Highlevel IRQ flow handlers</title>
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+ <para>
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+ The generic layer provides a set of pre-defined irq-flow methods:
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+ <itemizedlist>
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+ <listitem><para>handle_level_irq</para></listitem>
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+ <listitem><para>handle_edge_irq</para></listitem>
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+ <listitem><para>handle_simple_irq</para></listitem>
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+ <listitem><para>handle_percpu_irq</para></listitem>
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+ </itemizedlist>
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+ The interrupt flow handlers (either predefined or architecture
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+ specific) are assigned to specific interrupts by the architecture
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+ either during bootup or during device initialization.
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+ </para>
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+ <sect2>
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+ <title>Default flow implementations</title>
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+ <sect3>
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+ <title>Helper functions</title>
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+ <para>
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+ The helper functions call the chip primitives and
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+ are used by the default flow implementations.
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+ The following helper functions are implemented (simplified excerpt):
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+ <programlisting>
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+default_enable(irq)
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+{
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+ desc->chip->unmask(irq);
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+}
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+
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+default_disable(irq)
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+{
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+ if (!delay_disable(irq))
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+ desc->chip->mask(irq);
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+}
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+
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+default_ack(irq)
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+{
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+ chip->ack(irq);
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+}
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+
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+default_mask_ack(irq)
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+{
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+ if (chip->mask_ack) {
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+ chip->mask_ack(irq);
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+ } else {
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+ chip->mask(irq);
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+ chip->ack(irq);
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+ }
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+}
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+
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+noop(irq)
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+{
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+}
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+
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+ </programlisting>
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+ </para>
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+ </sect3>
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+ </sect2>
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+ <sect2>
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+ <title>Default flow handler implementations</title>
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+ <sect3>
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+ <title>Default Level IRQ flow handler</title>
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+ <para>
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+ handle_level_irq provides a generic implementation
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+ for level-triggered interrupts.
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+ </para>
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+ <para>
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+ The following control flow is implemented (simplified excerpt):
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+ <programlisting>
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+desc->chip->start();
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+handle_IRQ_event(desc->action);
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+desc->chip->end();
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+ </programlisting>
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+ </para>
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+ </sect3>
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+ <sect3>
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+ <title>Default Edge IRQ flow handler</title>
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+ <para>
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+ handle_edge_irq provides a generic implementation
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+ for edge-triggered interrupts.
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+ </para>
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+ <para>
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+ The following control flow is implemented (simplified excerpt):
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+ <programlisting>
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+if (desc->status & running) {
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+ desc->chip->hold();
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+ desc->status |= pending | masked;
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+ return;
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+}
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+desc->chip->start();
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+desc->status |= running;
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+do {
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+ if (desc->status & masked)
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+ desc->chip->enable();
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+ desc-status &= ~pending;
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+ handle_IRQ_event(desc->action);
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+} while (status & pending);
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+desc-status &= ~running;
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+desc->chip->end();
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+ </programlisting>
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+ </para>
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+ </sect3>
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+ <sect3>
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+ <title>Default simple IRQ flow handler</title>
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+ <para>
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+ handle_simple_irq provides a generic implementation
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+ for simple interrupts.
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+ </para>
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+ <para>
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+ Note: The simple flow handler does not call any
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+ handler/chip primitives.
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+ </para>
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+ <para>
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+ The following control flow is implemented (simplified excerpt):
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+ <programlisting>
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+handle_IRQ_event(desc->action);
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+ </programlisting>
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+ </para>
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+ </sect3>
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+ <sect3>
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+ <title>Default per CPU flow handler</title>
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+ <para>
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+ handle_percpu_irq provides a generic implementation
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+ for per CPU interrupts.
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+ </para>
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+ <para>
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+ Per CPU interrupts are only available on SMP and
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+ the handler provides a simplified version without
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+ locking.
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+ </para>
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+ <para>
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+ The following control flow is implemented (simplified excerpt):
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+ <programlisting>
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+desc->chip->start();
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+handle_IRQ_event(desc->action);
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+desc->chip->end();
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+ </programlisting>
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+ </para>
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+ </sect3>
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+ </sect2>
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+ <sect2>
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+ <title>Quirks and optimizations</title>
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+ <para>
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+ The generic functions are intended for 'clean' architectures and chips,
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+ which have no platform-specific IRQ handling quirks. If an architecture
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+ needs to implement quirks on the 'flow' level then it can do so by
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+ overriding the highlevel irq-flow handler.
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+ </para>
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+ </sect2>
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+ <sect2>
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+ <title>Delayed interrupt disable</title>
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+ <para>
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+ This per interrupt selectable feature, which was introduced by Russell
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+ King in the ARM interrupt implementation, does not mask an interrupt
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+ at the hardware level when disable_irq() is called. The interrupt is
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|
|
|
+ kept enabled and is masked in the flow handler when an interrupt event
|
|
|
|
+ happens. This prevents losing edge interrupts on hardware which does
|
|
|
|
+ not store an edge interrupt event while the interrupt is disabled at
|
|
|
|
+ the hardware level. When an interrupt arrives while the IRQ_DISABLED
|
|
|
|
+ flag is set, then the interrupt is masked at the hardware level and
|
|
|
|
+ the IRQ_PENDING bit is set. When the interrupt is re-enabled by
|
|
|
|
+ enable_irq() the pending bit is checked and if it is set, the
|
|
|
|
+ interrupt is resent either via hardware or by a software resend
|
|
|
|
+ mechanism. (It's necessary to enable CONFIG_HARDIRQS_SW_RESEND when
|
|
|
|
+ you want to use the delayed interrupt disable feature and your
|
|
|
|
+ hardware is not capable of retriggering an interrupt.)
|
|
|
|
+ The delayed interrupt disable can be runtime enabled, per interrupt,
|
|
|
|
+ by setting the IRQ_DELAYED_DISABLE flag in the irq_desc status field.
|
|
|
|
+ </para>
|
|
|
|
+ </sect2>
|
|
|
|
+ </sect1>
|
|
|
|
+ <sect1>
|
|
|
|
+ <title>Chiplevel hardware encapsulation</title>
|
|
|
|
+ <para>
|
|
|
|
+ The chip level hardware descriptor structure irq_chip
|
|
|
|
+ contains all the direct chip relevant functions, which
|
|
|
|
+ can be utilized by the irq flow implementations.
|
|
|
|
+ <itemizedlist>
|
|
|
|
+ <listitem><para>ack()</para></listitem>
|
|
|
|
+ <listitem><para>mask_ack() - Optional, recommended for performance</para></listitem>
|
|
|
|
+ <listitem><para>mask()</para></listitem>
|
|
|
|
+ <listitem><para>unmask()</para></listitem>
|
|
|
|
+ <listitem><para>retrigger() - Optional</para></listitem>
|
|
|
|
+ <listitem><para>set_type() - Optional</para></listitem>
|
|
|
|
+ <listitem><para>set_wake() - Optional</para></listitem>
|
|
|
|
+ </itemizedlist>
|
|
|
|
+ These primitives are strictly intended to mean what they say: ack means
|
|
|
|
+ ACK, masking means masking of an IRQ line, etc. It is up to the flow
|
|
|
|
+ handler(s) to use these basic units of lowlevel functionality.
|
|
|
|
+ </para>
|
|
|
|
+ </sect1>
|
|
|
|
+ </chapter>
|
|
|
|
+
|
|
|
|
+ <chapter id="doirq">
|
|
|
|
+ <title>__do_IRQ entry point</title>
|
|
|
|
+ <para>
|
|
|
|
+ The original implementation __do_IRQ() is an alternative entry
|
|
|
|
+ point for all types of interrupts.
|
|
|
|
+ </para>
|
|
|
|
+ <para>
|
|
|
|
+ This handler turned out to be not suitable for all
|
|
|
|
+ interrupt hardware and was therefore reimplemented with split
|
|
|
|
+ functionality for egde/level/simple/percpu interrupts. This is not
|
|
|
|
+ only a functional optimization. It also shortens code paths for
|
|
|
|
+ interrupts.
|
|
|
|
+ </para>
|
|
|
|
+ <para>
|
|
|
|
+ To make use of the split implementation, replace the call to
|
|
|
|
+ __do_IRQ by a call to desc->chip->handle_irq() and associate
|
|
|
|
+ the appropriate handler function to desc->chip->handle_irq().
|
|
|
|
+ In most cases the generic handler implementations should
|
|
|
|
+ be sufficient.
|
|
|
|
+ </para>
|
|
|
|
+ </chapter>
|
|
|
|
+
|
|
|
|
+ <chapter id="locking">
|
|
|
|
+ <title>Locking on SMP</title>
|
|
|
|
+ <para>
|
|
|
|
+ The locking of chip registers is up to the architecture that
|
|
|
|
+ defines the chip primitives. There is a chip->lock field that can be used
|
|
|
|
+ for serialization, but the generic layer does not touch it. The per-irq
|
|
|
|
+ structure is protected via desc->lock, by the generic layer.
|
|
|
|
+ </para>
|
|
|
|
+ </chapter>
|
|
|
|
+ <chapter id="structs">
|
|
|
|
+ <title>Structures</title>
|
|
|
|
+ <para>
|
|
|
|
+ This chapter contains the autogenerated documentation of the structures which are
|
|
|
|
+ used in the generic IRQ layer.
|
|
|
|
+ </para>
|
|
|
|
+!Iinclude/linux/irq.h
|
|
|
|
+ </chapter>
|
|
|
|
+
|
|
|
|
+ <chapter id="pubfunctions">
|
|
|
|
+ <title>Public Functions Provided</title>
|
|
|
|
+ <para>
|
|
|
|
+ This chapter contains the autogenerated documentation of the kernel API functions
|
|
|
|
+ which are exported.
|
|
|
|
+ </para>
|
|
|
|
+!Ekernel/irq/manage.c
|
|
|
|
+!Ekernel/irq/chip.c
|
|
|
|
+ </chapter>
|
|
|
|
+
|
|
|
|
+ <chapter id="intfunctions">
|
|
|
|
+ <title>Internal Functions Provided</title>
|
|
|
|
+ <para>
|
|
|
|
+ This chapter contains the autogenerated documentation of the internal functions.
|
|
|
|
+ </para>
|
|
|
|
+!Ikernel/irq/handle.c
|
|
|
|
+!Ikernel/irq/chip.c
|
|
|
|
+ </chapter>
|
|
|
|
+
|
|
|
|
+ <chapter id="credits">
|
|
|
|
+ <title>Credits</title>
|
|
|
|
+ <para>
|
|
|
|
+ The following people have contributed to this document:
|
|
|
|
+ <orderedlist>
|
|
|
|
+ <listitem><para>Thomas Gleixner<email>tglx@linutronix.de</email></para></listitem>
|
|
|
|
+ <listitem><para>Ingo Molnar<email>mingo@elte.hu</email></para></listitem>
|
|
|
|
+ </orderedlist>
|
|
|
|
+ </para>
|
|
|
|
+ </chapter>
|
|
|
|
+</book>
|