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@@ -898,21 +898,30 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
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{
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struct pci_dev *bridge = bus->self;
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struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
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+ resource_size_t b_res_3_size = pci_cardbus_mem_size * 2;
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u16 ctrl;
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/*
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* Reserve some resources for CardBus. We reserve
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* a fixed amount of bus space for CardBus bridges.
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*/
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- b_res[0].start = 0;
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- b_res[0].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN;
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- if (realloc_head)
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- add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size, 0 /* dont care */);
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+ b_res[0].start = pci_cardbus_io_size;
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+ b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1;
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+ b_res[0].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
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+ if (realloc_head) {
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+ b_res[0].end -= pci_cardbus_io_size;
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+ add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,
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+ pci_cardbus_io_size);
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+ }
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- b_res[1].start = 0;
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- b_res[1].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN;
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- if (realloc_head)
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- add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size, 0 /* dont care */);
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+ b_res[1].start = pci_cardbus_io_size;
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+ b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1;
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+ b_res[1].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
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+ if (realloc_head) {
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+ b_res[1].end -= pci_cardbus_io_size;
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+ add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size,
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+ pci_cardbus_io_size);
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+ }
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/* MEM1 must not be pref mmio */
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pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
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@@ -939,28 +948,28 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
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* twice the size.
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*/
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if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
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- b_res[2].start = 0;
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- b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_SIZEALIGN;
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- if (realloc_head)
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- add_to_list(realloc_head, bridge, b_res+2, pci_cardbus_mem_size, 0 /* dont care */);
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-
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- b_res[3].start = 0;
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- b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN;
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- if (realloc_head)
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- add_to_list(realloc_head, bridge, b_res+3, pci_cardbus_mem_size, 0 /* dont care */);
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- } else {
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- b_res[3].start = 0;
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- b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN;
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- if (realloc_head)
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- add_to_list(realloc_head, bridge, b_res+3, pci_cardbus_mem_size * 2, 0 /* dont care */);
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+ b_res[2].start = pci_cardbus_mem_size;
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+ b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1;
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+ b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH |
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+ IORESOURCE_STARTALIGN;
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+ if (realloc_head) {
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+ b_res[2].end -= pci_cardbus_mem_size;
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+ add_to_list(realloc_head, bridge, b_res+2,
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+ pci_cardbus_mem_size, pci_cardbus_mem_size);
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+ }
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+
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+ /* reduce that to half */
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+ b_res_3_size = pci_cardbus_mem_size;
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}
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- /* set the size of the resource to zero, so that the resource does not
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- * get assigned during required-resource allocation cycle but gets assigned
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- * during the optional-resource allocation cycle.
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- */
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- b_res[0].start = b_res[1].start = b_res[2].start = b_res[3].start = 1;
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- b_res[0].end = b_res[1].end = b_res[2].end = b_res[3].end = 0;
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+ b_res[3].start = pci_cardbus_mem_size;
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+ b_res[3].end = b_res[3].start + b_res_3_size - 1;
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+ b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN;
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+ if (realloc_head) {
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+ b_res[3].end -= b_res_3_size;
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+ add_to_list(realloc_head, bridge, b_res+3, b_res_3_size,
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+ pci_cardbus_mem_size);
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+ }
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}
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void __ref __pci_bus_size_bridges(struct pci_bus *bus,
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