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@@ -0,0 +1,205 @@
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+/*
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+ * DMA Mapping glue for ARC
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+ *
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+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#ifndef ASM_ARC_DMA_MAPPING_H
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+#define ASM_ARC_DMA_MAPPING_H
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+
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+#include <asm-generic/dma-coherent.h>
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+#include <asm/cacheflush.h>
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+#include <plat/dma_addr.h>
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+
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+void *dma_alloc_noncoherent(struct device *dev, size_t size,
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+ dma_addr_t *dma_handle, gfp_t gfp);
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+
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+void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
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+ dma_addr_t dma_handle);
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+
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+void *dma_alloc_coherent(struct device *dev, size_t size,
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+ dma_addr_t *dma_handle, gfp_t gfp);
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+
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+void dma_free_coherent(struct device *dev, size_t size, void *kvaddr,
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+ dma_addr_t dma_handle);
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+
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+/* drivers/base/dma-mapping.c */
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+extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
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+ void *cpu_addr, dma_addr_t dma_addr, size_t size);
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+extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
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+ void *cpu_addr, dma_addr_t dma_addr,
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+ size_t size);
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+
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+#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
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+#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
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+
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+/*
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+ * streaming DMA Mapping API...
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+ * CPU accesses page via normal paddr, thus needs to explicitly made
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+ * consistent before each use
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+ */
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+
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+static inline void __inline_dma_cache_sync(unsigned long paddr, size_t size,
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+ enum dma_data_direction dir)
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+{
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+ switch (dir) {
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+ case DMA_FROM_DEVICE:
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+ dma_cache_inv(paddr, size);
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+ break;
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+ case DMA_TO_DEVICE:
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+ dma_cache_wback(paddr, size);
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+ break;
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+ case DMA_BIDIRECTIONAL:
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+ dma_cache_wback_inv(paddr, size);
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+ break;
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+ default:
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+ pr_err("Invalid DMA dir [%d] for OP @ %lx\n", dir, paddr);
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+ }
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+}
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+
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+void __arc_dma_cache_sync(unsigned long paddr, size_t size,
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+ enum dma_data_direction dir);
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+
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+#define _dma_cache_sync(addr, sz, dir) \
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+do { \
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+ if (__builtin_constant_p(dir)) \
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+ __inline_dma_cache_sync(addr, sz, dir); \
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+ else \
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+ __arc_dma_cache_sync(addr, sz, dir); \
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+} \
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+while (0);
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+
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+static inline dma_addr_t
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+dma_map_single(struct device *dev, void *cpu_addr, size_t size,
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+ enum dma_data_direction dir)
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+{
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+ _dma_cache_sync((unsigned long)cpu_addr, size, dir);
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+ return plat_kernel_addr_to_dma(dev, cpu_addr);
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+}
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+
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+static inline void
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+dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
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+ size_t size, enum dma_data_direction dir)
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+{
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+}
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+
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+static inline dma_addr_t
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+dma_map_page(struct device *dev, struct page *page,
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+ unsigned long offset, size_t size,
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+ enum dma_data_direction dir)
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+{
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+ unsigned long paddr = page_to_phys(page) + offset;
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+ return dma_map_single(dev, (void *)paddr, size, dir);
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+}
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+
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+static inline void
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+dma_unmap_page(struct device *dev, dma_addr_t dma_handle,
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+ size_t size, enum dma_data_direction dir)
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+{
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+}
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+
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+static inline int
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+dma_map_sg(struct device *dev, struct scatterlist *sg,
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+ int nents, enum dma_data_direction dir)
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+{
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+ struct scatterlist *s;
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+ int i;
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+
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+ for_each_sg(sg, s, nents, i)
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+ sg->dma_address = dma_map_page(dev, sg_page(s), s->offset,
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+ s->length, dir);
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+
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+ return nents;
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+}
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+
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+static inline void
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+dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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+ int nents, enum dma_data_direction dir)
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+{
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+ struct scatterlist *s;
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+ int i;
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+
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+ for_each_sg(sg, s, nents, i)
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+ dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
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+}
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+
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+static inline void
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+dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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+ size_t size, enum dma_data_direction dir)
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+{
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+ _dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle), size,
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+ DMA_FROM_DEVICE);
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+}
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+
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+static inline void
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+dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
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+ size_t size, enum dma_data_direction dir)
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+{
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+ _dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle), size,
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+ DMA_TO_DEVICE);
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+}
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+
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+static inline void
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+dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
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+ unsigned long offset, size_t size,
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+ enum dma_data_direction direction)
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+{
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+ _dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle) + offset,
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+ size, DMA_FROM_DEVICE);
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+}
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+
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+static inline void
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+dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
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+ unsigned long offset, size_t size,
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+ enum dma_data_direction direction)
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+{
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+ _dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle) + offset,
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+ size, DMA_TO_DEVICE);
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+}
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+
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+static inline void
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+dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
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+ enum dma_data_direction dir)
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+{
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+ int i;
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+
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+ for (i = 0; i < nelems; i++, sg++)
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+ _dma_cache_sync((unsigned int)sg_virt(sg), sg->length, dir);
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+}
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+
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+static inline void
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+dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
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+ enum dma_data_direction dir)
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+{
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+ int i;
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+
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+ for (i = 0; i < nelems; i++, sg++)
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+ _dma_cache_sync((unsigned int)sg_virt(sg), sg->length, dir);
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+}
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+
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+static inline int dma_supported(struct device *dev, u64 dma_mask)
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+{
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+ /* Support 32 bit DMA mask exclusively */
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+ return dma_mask == DMA_BIT_MASK(32);
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+}
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+
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+static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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+{
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+ return 0;
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+}
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+
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+static inline int dma_set_mask(struct device *dev, u64 dma_mask)
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+{
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+ if (!dev->dma_mask || !dma_supported(dev, dma_mask))
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+ return -EIO;
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+
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+ *dev->dma_mask = dma_mask;
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+
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+ return 0;
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+}
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+
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+#endif
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