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@@ -1129,6 +1129,27 @@ ilk_dummy_write(struct drm_i915_private *dev_priv)
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I915_WRITE_NOTRACE(MI_MODE, 0);
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}
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+static void
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+hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
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+{
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+ if (IS_HASWELL(dev_priv->dev) &&
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+ (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) {
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+ DRM_ERROR("Unknown unclaimed register before writing to %x\n",
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+ reg);
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+ I915_WRITE_NOTRACE(GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED);
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+ }
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+}
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+
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+static void
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+hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
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+{
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+ if (IS_HASWELL(dev_priv->dev) &&
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+ (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) {
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+ DRM_ERROR("Unclaimed write to %x\n", reg);
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+ writel(ERR_INT_MMIO_UNCLAIMED, dev_priv->regs + GEN7_ERR_INT);
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+ }
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+}
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+
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#define __i915_read(x, y) \
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u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
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u##x val = 0; \
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@@ -1165,18 +1186,12 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
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} \
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if (IS_GEN5(dev_priv->dev)) \
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ilk_dummy_write(dev_priv); \
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- if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
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- DRM_ERROR("Unknown unclaimed register before writing to %x\n", reg); \
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- I915_WRITE_NOTRACE(GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED); \
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- } \
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+ hsw_unclaimed_reg_clear(dev_priv, reg); \
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write##y(val, dev_priv->regs + reg); \
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if (unlikely(__fifo_ret)) { \
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gen6_gt_check_fifodbg(dev_priv); \
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} \
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- if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
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- DRM_ERROR("Unclaimed write to %x\n", reg); \
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- writel(ERR_INT_MMIO_UNCLAIMED, dev_priv->regs + GEN7_ERR_INT); \
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- } \
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+ hsw_unclaimed_reg_check(dev_priv, reg); \
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}
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__i915_write(8, b)
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__i915_write(16, w)
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