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@@ -187,33 +187,33 @@ static void iwl_eeprom_release_semaphore(struct iwl_trans *trans)
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}
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-static int iwl_eeprom_verify_signature(struct iwl_trans *trans)
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+static int iwl_eeprom_verify_signature(struct iwl_priv *priv)
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{
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- u32 gp = iwl_read32(trans, CSR_EEPROM_GP) &
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+ u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP) &
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CSR_EEPROM_GP_VALID_MSK;
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int ret = 0;
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- IWL_DEBUG_EEPROM(trans, "EEPROM signature=0x%08x\n", gp);
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+ IWL_DEBUG_EEPROM(priv, "EEPROM signature=0x%08x\n", gp);
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switch (gp) {
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case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:
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- if (trans->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
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- IWL_ERR(trans, "EEPROM with bad signature: 0x%08x\n",
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+ if (priv->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
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+ IWL_ERR(priv, "EEPROM with bad signature: 0x%08x\n",
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gp);
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ret = -ENOENT;
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}
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break;
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case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
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case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
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- if (trans->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {
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- IWL_ERR(trans, "OTP with bad signature: 0x%08x\n", gp);
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+ if (priv->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {
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+ IWL_ERR(priv, "OTP with bad signature: 0x%08x\n", gp);
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ret = -ENOENT;
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}
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break;
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case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP:
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default:
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- IWL_ERR(trans, "bad EEPROM/OTP signature, type=%s, "
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+ IWL_ERR(priv, "bad EEPROM/OTP signature, type=%s, "
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"EEPROM_GP=0x%08x\n",
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- (trans->nvm_device_type == NVM_DEVICE_TYPE_OTP)
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+ (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
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? "OTP" : "EEPROM", gp);
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ret = -ENOENT;
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break;
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@@ -221,11 +221,11 @@ static int iwl_eeprom_verify_signature(struct iwl_trans *trans)
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return ret;
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}
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-u16 iwl_eeprom_query16(const struct iwl_shared *shrd, size_t offset)
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+u16 iwl_eeprom_query16(struct iwl_priv *priv, size_t offset)
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{
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- if (!shrd->eeprom)
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+ if (!priv->eeprom)
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return 0;
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- return (u16)shrd->eeprom[offset] | ((u16)shrd->eeprom[offset + 1] << 8);
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+ return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
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}
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int iwl_eeprom_check_version(struct iwl_priv *priv)
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@@ -233,8 +233,8 @@ int iwl_eeprom_check_version(struct iwl_priv *priv)
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u16 eeprom_ver;
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u16 calib_ver;
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- eeprom_ver = iwl_eeprom_query16(priv->shrd, EEPROM_VERSION);
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- calib_ver = iwl_eeprom_calib_version(priv->shrd);
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+ eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
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+ calib_ver = iwl_eeprom_calib_version(priv);
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if (eeprom_ver < cfg(priv)->eeprom_ver ||
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calib_ver < cfg(priv)->eeprom_calib_ver)
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@@ -255,10 +255,9 @@ err:
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int iwl_eeprom_init_hw_params(struct iwl_priv *priv)
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{
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- struct iwl_shared *shrd = priv->shrd;
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u16 radio_cfg;
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- priv->hw_params.sku = iwl_eeprom_query16(shrd, EEPROM_SKU_CAP);
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+ priv->hw_params.sku = iwl_eeprom_query16(priv, EEPROM_SKU_CAP);
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if (priv->hw_params.sku & EEPROM_SKU_CAP_11N_ENABLE &&
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!cfg(priv)->ht_params) {
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IWL_ERR(priv, "Invalid 11n configuration\n");
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@@ -272,7 +271,7 @@ int iwl_eeprom_init_hw_params(struct iwl_priv *priv)
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IWL_INFO(priv, "Device SKU: 0x%X\n", priv->hw_params.sku);
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- radio_cfg = iwl_eeprom_query16(shrd, EEPROM_RADIO_CONFIG);
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+ radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
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priv->hw_params.valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
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priv->hw_params.valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
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@@ -296,9 +295,67 @@ int iwl_eeprom_init_hw_params(struct iwl_priv *priv)
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return 0;
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}
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-void iwl_eeprom_get_mac(const struct iwl_shared *shrd, u8 *mac)
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+u16 iwl_eeprom_calib_version(struct iwl_priv *priv)
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{
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- const u8 *addr = iwl_eeprom_query_addr(shrd,
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+ struct iwl_eeprom_calib_hdr *hdr;
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+
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+ hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
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+ EEPROM_CALIB_ALL);
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+ return hdr->version;
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+}
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+
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+static u32 eeprom_indirect_address(struct iwl_priv *priv, u32 address)
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+{
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+ u16 offset = 0;
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+
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+ if ((address & INDIRECT_ADDRESS) == 0)
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+ return address;
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+
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+ switch (address & INDIRECT_TYPE_MSK) {
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+ case INDIRECT_HOST:
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+ offset = iwl_eeprom_query16(priv, EEPROM_LINK_HOST);
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+ break;
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+ case INDIRECT_GENERAL:
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+ offset = iwl_eeprom_query16(priv, EEPROM_LINK_GENERAL);
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+ break;
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+ case INDIRECT_REGULATORY:
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+ offset = iwl_eeprom_query16(priv, EEPROM_LINK_REGULATORY);
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+ break;
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+ case INDIRECT_TXP_LIMIT:
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+ offset = iwl_eeprom_query16(priv, EEPROM_LINK_TXP_LIMIT);
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+ break;
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+ case INDIRECT_TXP_LIMIT_SIZE:
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+ offset = iwl_eeprom_query16(priv, EEPROM_LINK_TXP_LIMIT_SIZE);
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+ break;
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+ case INDIRECT_CALIBRATION:
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+ offset = iwl_eeprom_query16(priv, EEPROM_LINK_CALIBRATION);
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+ break;
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+ case INDIRECT_PROCESS_ADJST:
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+ offset = iwl_eeprom_query16(priv, EEPROM_LINK_PROCESS_ADJST);
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+ break;
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+ case INDIRECT_OTHERS:
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+ offset = iwl_eeprom_query16(priv, EEPROM_LINK_OTHERS);
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+ break;
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+ default:
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+ IWL_ERR(priv, "illegal indirect type: 0x%X\n",
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+ address & INDIRECT_TYPE_MSK);
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+ break;
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+ }
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+
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+ /* translate the offset from words to byte */
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+ return (address & ADDRESS_MSK) + (offset << 1);
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+}
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+
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+const u8 *iwl_eeprom_query_addr(struct iwl_priv *priv, size_t offset)
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+{
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+ u32 address = eeprom_indirect_address(priv, offset);
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+ BUG_ON(address >= cfg(priv)->base_params->eeprom_size);
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+ return &priv->eeprom[address];
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+}
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+
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+void iwl_eeprom_get_mac(struct iwl_priv *priv, u8 *mac)
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+{
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+ const u8 *addr = iwl_eeprom_query_addr(priv,
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EEPROM_MAC_ADDRESS);
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memcpy(mac, addr, ETH_ALEN);
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}
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@@ -591,7 +648,6 @@ iwl_eeprom_enh_txp_read_element(struct iwl_priv *priv,
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static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
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{
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- struct iwl_shared *shrd = priv->shrd;
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struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
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int idx, entries;
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__le16 *txp_len;
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@@ -600,10 +656,10 @@ static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
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BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);
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/* the length is in 16-bit words, but we want entries */
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- txp_len = (__le16 *) iwl_eeprom_query_addr(shrd, EEPROM_TXP_SZ_OFFS);
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+ txp_len = (__le16 *) iwl_eeprom_query_addr(priv, EEPROM_TXP_SZ_OFFS);
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entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
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- txp_array = (void *) iwl_eeprom_query_addr(shrd, EEPROM_TXP_OFFS);
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+ txp_array = (void *) iwl_eeprom_query_addr(priv, EEPROM_TXP_OFFS);
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for (idx = 0; idx < entries; idx++) {
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txp = &txp_array[idx];
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@@ -656,66 +712,66 @@ static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
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/**
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* iwl_eeprom_init - read EEPROM contents
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*
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- * Load the EEPROM contents from adapter into shrd->eeprom
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+ * Load the EEPROM contents from adapter into priv->eeprom
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*
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* NOTE: This routine uses the non-debug IO access functions.
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*/
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-int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev)
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+int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
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{
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__le16 *e;
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- u32 gp = iwl_read32(trans, CSR_EEPROM_GP);
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+ u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP);
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int sz;
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int ret;
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u16 addr;
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u16 validblockaddr = 0;
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u16 cache_addr = 0;
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- trans->nvm_device_type = iwl_get_nvm_type(trans, hw_rev);
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- if (trans->nvm_device_type == -ENOENT)
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+ priv->nvm_device_type = iwl_get_nvm_type(trans(priv), hw_rev);
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+ if (priv->nvm_device_type == -ENOENT)
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return -ENOENT;
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/* allocate eeprom */
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- sz = cfg(trans)->base_params->eeprom_size;
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- IWL_DEBUG_EEPROM(trans, "NVM size = %d\n", sz);
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- trans->shrd->eeprom = kzalloc(sz, GFP_KERNEL);
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- if (!trans->shrd->eeprom) {
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+ sz = cfg(priv)->base_params->eeprom_size;
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+ IWL_DEBUG_EEPROM(priv, "NVM size = %d\n", sz);
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+ priv->eeprom = kzalloc(sz, GFP_KERNEL);
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+ if (!priv->eeprom) {
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ret = -ENOMEM;
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goto alloc_err;
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}
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- e = (__le16 *)trans->shrd->eeprom;
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+ e = (__le16 *)priv->eeprom;
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- ret = iwl_eeprom_verify_signature(trans);
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+ ret = iwl_eeprom_verify_signature(priv);
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if (ret < 0) {
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- IWL_ERR(trans, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
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+ IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
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ret = -ENOENT;
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goto err;
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}
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/* Make sure driver (instead of uCode) is allowed to read EEPROM */
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- ret = iwl_eeprom_acquire_semaphore(trans);
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+ ret = iwl_eeprom_acquire_semaphore(trans(priv));
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if (ret < 0) {
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- IWL_ERR(trans, "Failed to acquire EEPROM semaphore.\n");
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+ IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
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ret = -ENOENT;
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goto err;
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}
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- if (trans->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
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+ if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
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- ret = iwl_init_otp_access(trans);
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+ ret = iwl_init_otp_access(trans(priv));
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if (ret) {
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- IWL_ERR(trans, "Failed to initialize OTP access.\n");
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+ IWL_ERR(priv, "Failed to initialize OTP access.\n");
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ret = -ENOENT;
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goto done;
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}
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- iwl_write32(trans, CSR_EEPROM_GP,
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- iwl_read32(trans, CSR_EEPROM_GP) &
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+ iwl_write32(trans(priv), CSR_EEPROM_GP,
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+ iwl_read32(trans(priv), CSR_EEPROM_GP) &
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~CSR_EEPROM_GP_IF_OWNER_MSK);
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- iwl_set_bit(trans, CSR_OTP_GP_REG,
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+ iwl_set_bit(trans(priv), CSR_OTP_GP_REG,
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CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
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CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
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/* traversing the linked list if no shadow ram supported */
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- if (!cfg(trans)->base_params->shadow_ram_support) {
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- if (iwl_find_otp_image(trans, &validblockaddr)) {
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+ if (!cfg(priv)->base_params->shadow_ram_support) {
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+ if (iwl_find_otp_image(trans(priv), &validblockaddr)) {
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ret = -ENOENT;
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goto done;
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}
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@@ -724,7 +780,8 @@ int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev)
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addr += sizeof(u16)) {
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__le16 eeprom_data;
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- ret = iwl_read_otp_word(trans, addr, &eeprom_data);
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+ ret = iwl_read_otp_word(trans(priv), addr,
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+ &eeprom_data);
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if (ret)
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goto done;
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e[cache_addr / 2] = eeprom_data;
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@@ -735,94 +792,93 @@ int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev)
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for (addr = 0; addr < sz; addr += sizeof(u16)) {
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u32 r;
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- iwl_write32(trans, CSR_EEPROM_REG,
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+ iwl_write32(trans(priv), CSR_EEPROM_REG,
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CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
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- ret = iwl_poll_bit(trans, CSR_EEPROM_REG,
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+ ret = iwl_poll_bit(trans(priv), CSR_EEPROM_REG,
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CSR_EEPROM_REG_READ_VALID_MSK,
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CSR_EEPROM_REG_READ_VALID_MSK,
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IWL_EEPROM_ACCESS_TIMEOUT);
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if (ret < 0) {
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- IWL_ERR(trans,
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+ IWL_ERR(priv,
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"Time out reading EEPROM[%d]\n", addr);
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goto done;
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}
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- r = iwl_read32(trans, CSR_EEPROM_REG);
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+ r = iwl_read32(trans(priv), CSR_EEPROM_REG);
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e[addr / 2] = cpu_to_le16(r >> 16);
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}
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}
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- IWL_DEBUG_EEPROM(trans, "NVM Type: %s, version: 0x%x\n",
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- (trans->nvm_device_type == NVM_DEVICE_TYPE_OTP)
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+ IWL_DEBUG_EEPROM(priv, "NVM Type: %s, version: 0x%x\n",
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+ (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
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? "OTP" : "EEPROM",
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- iwl_eeprom_query16(trans->shrd, EEPROM_VERSION));
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+ iwl_eeprom_query16(priv, EEPROM_VERSION));
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ret = 0;
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done:
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- iwl_eeprom_release_semaphore(trans);
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+ iwl_eeprom_release_semaphore(trans(priv));
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err:
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if (ret)
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- iwl_eeprom_free(trans->shrd);
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+ iwl_eeprom_free(priv);
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alloc_err:
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return ret;
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}
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-void iwl_eeprom_free(struct iwl_shared *shrd)
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+void iwl_eeprom_free(struct iwl_priv *priv)
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{
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- kfree(shrd->eeprom);
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- shrd->eeprom = NULL;
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+ kfree(priv->eeprom);
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+ priv->eeprom = NULL;
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}
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-static void iwl_init_band_reference(const struct iwl_priv *priv,
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+static void iwl_init_band_reference(struct iwl_priv *priv,
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int eep_band, int *eeprom_ch_count,
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const struct iwl_eeprom_channel **eeprom_ch_info,
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const u8 **eeprom_ch_index)
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{
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- struct iwl_shared *shrd = priv->shrd;
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u32 offset = cfg(priv)->lib->
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eeprom_ops.regulatory_bands[eep_band - 1];
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switch (eep_band) {
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case 1: /* 2.4GHz band */
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*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
|
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
|
- iwl_eeprom_query_addr(shrd, offset);
|
|
|
+ iwl_eeprom_query_addr(priv, offset);
|
|
|
*eeprom_ch_index = iwl_eeprom_band_1;
|
|
|
break;
|
|
|
case 2: /* 4.9GHz band */
|
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
|
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
|
- iwl_eeprom_query_addr(shrd, offset);
|
|
|
+ iwl_eeprom_query_addr(priv, offset);
|
|
|
*eeprom_ch_index = iwl_eeprom_band_2;
|
|
|
break;
|
|
|
case 3: /* 5.2GHz band */
|
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
|
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
|
- iwl_eeprom_query_addr(shrd, offset);
|
|
|
+ iwl_eeprom_query_addr(priv, offset);
|
|
|
*eeprom_ch_index = iwl_eeprom_band_3;
|
|
|
break;
|
|
|
case 4: /* 5.5GHz band */
|
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
|
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
|
- iwl_eeprom_query_addr(shrd, offset);
|
|
|
+ iwl_eeprom_query_addr(priv, offset);
|
|
|
*eeprom_ch_index = iwl_eeprom_band_4;
|
|
|
break;
|
|
|
case 5: /* 5.7GHz band */
|
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
|
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
|
- iwl_eeprom_query_addr(shrd, offset);
|
|
|
+ iwl_eeprom_query_addr(priv, offset);
|
|
|
*eeprom_ch_index = iwl_eeprom_band_5;
|
|
|
break;
|
|
|
case 6: /* 2.4GHz ht40 channels */
|
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
|
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
|
- iwl_eeprom_query_addr(shrd, offset);
|
|
|
+ iwl_eeprom_query_addr(priv, offset);
|
|
|
*eeprom_ch_index = iwl_eeprom_band_6;
|
|
|
break;
|
|
|
case 7: /* 5 GHz ht40 channels */
|
|
|
*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
|
|
|
*eeprom_ch_info = (struct iwl_eeprom_channel *)
|
|
|
- iwl_eeprom_query_addr(shrd, offset);
|
|
|
+ iwl_eeprom_query_addr(priv, offset);
|
|
|
*eeprom_ch_index = iwl_eeprom_band_7;
|
|
|
break;
|
|
|
default:
|
|
@@ -1072,7 +1128,7 @@ void iwl_rf_config(struct iwl_priv *priv)
|
|
|
{
|
|
|
u16 radio_cfg;
|
|
|
|
|
|
- radio_cfg = iwl_eeprom_query16(priv->shrd, EEPROM_RADIO_CONFIG);
|
|
|
+ radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
|
|
|
|
|
|
/* write radio config values to register */
|
|
|
if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX) {
|