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@@ -307,7 +307,7 @@
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#define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV)
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#define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T)
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-/* I/O port access macros and functions */
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+/* I/O port access functions */
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void SiS_SetReg(SISIOADDRESS, u8, u8);
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void SiS_SetRegByte(SISIOADDRESS, u8);
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@@ -321,58 +321,6 @@ u8 SiS_GetRegByte(SISIOADDRESS);
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u16 SiS_GetRegShort(SISIOADDRESS);
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u32 SiS_GetRegLong(SISIOADDRESS);
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-#define inSISREG(base) inb(base)
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-
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-#define outSISREG(base,val) outb(val,base)
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-
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-#define orSISREG(base,val) \
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- do { \
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- u8 __Temp = inSISREG(base); \
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- outSISREG(base, __Temp | (val));\
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- } while (0)
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-
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-#define andSISREG(base,val) \
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- do { \
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- u8 __Temp = inSISREG(base); \
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- outSISREG(base, __Temp & (val));\
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- } while (0)
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-
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-#define inSISIDXREG(base,idx,var) \
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- do { \
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- outSISREG(base, idx); \
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- var = inSISREG((base)+1); \
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- } while (0)
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-
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-#define outSISIDXREG(base,idx,val) \
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- do { \
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- outSISREG(base, idx); \
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- outSISREG((base)+1, val); \
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- } while (0)
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-
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-#define orSISIDXREG(base,idx,val) \
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- do { \
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- u8 __Temp; \
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- outSISREG(base, idx); \
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- __Temp = inSISREG((base)+1) | (val); \
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- outSISREG((base)+1, __Temp); \
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- } while (0)
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-
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-#define andSISIDXREG(base,idx,and) \
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- do { \
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- u8 __Temp; \
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- outSISREG(base, idx); \
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- __Temp = inSISREG((base)+1) & (and); \
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- outSISREG((base)+1, __Temp); \
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- } while (0)
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-
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-#define setSISIDXREG(base,idx,and,or) \
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- do { \
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- u8 __Temp; \
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- outSISREG(base, idx); \
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- __Temp = (inSISREG((base)+1) & (and)) | (or); \
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- outSISREG((base)+1, __Temp); \
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- } while (0)
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-
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/* MMIO access macros */
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#define MMIO_IN8(base, offset) readb((base+offset))
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#define MMIO_IN16(base, offset) readw((base+offset))
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