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@@ -1479,40 +1479,40 @@ static const struct dev_pm_ops s3c64xx_spi_pm = {
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s3c64xx_spi_runtime_resume, NULL)
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};
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-struct s3c64xx_spi_port_config s3c2443_spi_port_config = {
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+static struct s3c64xx_spi_port_config s3c2443_spi_port_config = {
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.fifo_lvl_mask = { 0x7f },
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.rx_lvl_offset = 13,
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.tx_st_done = 21,
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.high_speed = true,
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};
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-struct s3c64xx_spi_port_config s3c6410_spi_port_config = {
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+static struct s3c64xx_spi_port_config s3c6410_spi_port_config = {
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.fifo_lvl_mask = { 0x7f, 0x7F },
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.rx_lvl_offset = 13,
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.tx_st_done = 21,
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};
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-struct s3c64xx_spi_port_config s5p64x0_spi_port_config = {
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+static struct s3c64xx_spi_port_config s5p64x0_spi_port_config = {
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.fifo_lvl_mask = { 0x1ff, 0x7F },
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.rx_lvl_offset = 15,
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.tx_st_done = 25,
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};
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-struct s3c64xx_spi_port_config s5pc100_spi_port_config = {
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+static struct s3c64xx_spi_port_config s5pc100_spi_port_config = {
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.fifo_lvl_mask = { 0x7f, 0x7F },
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.rx_lvl_offset = 13,
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.tx_st_done = 21,
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.high_speed = true,
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};
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-struct s3c64xx_spi_port_config s5pv210_spi_port_config = {
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+static struct s3c64xx_spi_port_config s5pv210_spi_port_config = {
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.fifo_lvl_mask = { 0x1ff, 0x7F },
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.rx_lvl_offset = 15,
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.tx_st_done = 25,
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.high_speed = true,
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};
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-struct s3c64xx_spi_port_config exynos4_spi_port_config = {
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+static struct s3c64xx_spi_port_config exynos4_spi_port_config = {
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.fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F },
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.rx_lvl_offset = 15,
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.tx_st_done = 25,
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