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@@ -813,7 +813,7 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
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info->page_size = ndcr & NDCR_PAGE_SZ ? 2048 : 512;
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/* set info fields needed to read id */
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info->read_id_bytes = (info->page_size == 2048) ? 4 : 2;
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- info->reg_ndcr = ndcr;
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+ info->reg_ndcr = ndcr & ~NDCR_INT_MASK;
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info->cmdset = &default_cmdset;
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info->ndtr0cs0 = nand_readl(info, NDTR0CS0);
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@@ -882,7 +882,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
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struct pxa3xx_nand_info *info = mtd->priv;
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struct platform_device *pdev = info->pdev;
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struct pxa3xx_nand_platform_data *pdata = pdev->dev.platform_data;
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- struct nand_flash_dev pxa3xx_flash_ids[2] = { {NULL,}, {NULL,} };
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+ struct nand_flash_dev pxa3xx_flash_ids[2], *def = NULL;
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const struct pxa3xx_nand_flash *f = NULL;
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struct nand_chip *chip = mtd->priv;
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uint32_t id = -1;
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@@ -942,8 +942,10 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
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pxa3xx_flash_ids[0].erasesize = f->page_size * f->page_per_block;
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if (f->flash_width == 16)
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pxa3xx_flash_ids[0].options = NAND_BUSWIDTH_16;
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+ pxa3xx_flash_ids[1].name = NULL;
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+ def = pxa3xx_flash_ids;
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KEEP_CONFIG:
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- if (nand_scan_ident(mtd, 1, pxa3xx_flash_ids))
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+ if (nand_scan_ident(mtd, 1, def))
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return -ENODEV;
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/* calculate addressing information */
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info->col_addr_cycles = (mtd->writesize >= 2048) ? 2 : 1;
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@@ -954,9 +956,9 @@ KEEP_CONFIG:
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info->row_addr_cycles = 2;
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mtd->name = mtd_names[0];
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chip->ecc.mode = NAND_ECC_HW;
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- chip->ecc.size = f->page_size;
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+ chip->ecc.size = info->page_size;
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- chip->options = (f->flash_width == 16) ? NAND_BUSWIDTH_16 : 0;
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+ chip->options = (info->reg_ndcr & NDCR_DWIDTH_M) ? NAND_BUSWIDTH_16 : 0;
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chip->options |= NAND_NO_AUTOINCR;
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chip->options |= NAND_NO_READRDY;
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