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@@ -55,6 +55,13 @@ enum {
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OIS = 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */
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OIM = 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */
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+ YH2I_INT = 0x20,
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+ YINT_EN = 0x34,
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+ YI2H_INT = 0x9c,
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+ YI2H_INT_C = 0xa0,
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+ YH2I_REQ = 0xc0,
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+ YH2I_REQ_HI = 0xc4,
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+
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/* MU register value */
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MU_INBOUND_DOORBELL_HANDSHAKE = 1,
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MU_INBOUND_DOORBELL_REQHEADCHANGED = 2,
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@@ -95,9 +102,14 @@ enum {
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TASK_ATTRIBUTE_ORDERED = 0x2,
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TASK_ATTRIBUTE_ACA = 0x4,
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+ SS_STS_NORMAL = 0x80000000,
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+ SS_STS_DONE = 0x40000000,
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+ SS_STS_HANDSHAKE = 0x20000000,
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+
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+ SS_HEAD_HANDSHAKE = 0x80,
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+
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STEX_CDB_LENGTH = 16,
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STATUS_VAR_LEN = 128,
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- ST_MAX_SG = 32,
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/* sg flags */
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SG_CF_EOT = 0x80, /* end of table */
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@@ -111,6 +123,7 @@ enum {
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st_vsc = 1,
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st_yosemite = 2,
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st_seq = 3,
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+ st_yel = 4,
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PASSTHRU_REQ_TYPE = 0x00000001,
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PASSTHRU_REQ_NO_WAKEUP = 0x00000100,
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@@ -151,12 +164,26 @@ struct st_sgitem {
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__le64 addr;
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};
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+struct st_ss_sgitem {
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+ __le32 addr;
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+ __le32 addr_hi;
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+ __le32 count;
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+};
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+
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struct st_sgtable {
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__le16 sg_count;
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__le16 max_sg_count;
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__le32 sz_in_byte;
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};
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+struct st_msg_header {
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+ __le64 handle;
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+ u8 flag;
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+ u8 channel;
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+ __le16 timeout;
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+ u32 reserved;
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+};
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+
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struct handshake_frame {
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__le64 rb_phy; /* request payload queue physical address */
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__le16 req_sz; /* size of each request payload */
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@@ -172,7 +199,8 @@ struct handshake_frame {
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__le32 partner_ver_build;
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__le32 extra_offset; /* NEW */
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__le32 extra_size; /* NEW */
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- u32 reserved1[2];
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+ __le32 scratch_size;
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+ u32 reserved1;
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};
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struct req_msg {
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@@ -263,6 +291,10 @@ struct st_hba {
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struct Scsi_Host *host;
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struct pci_dev *pdev;
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+ struct req_msg * (*alloc_rq) (struct st_hba *);
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+ int (*map_sg)(struct st_hba *, struct req_msg *, struct st_ccb *);
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+ void (*send) (struct st_hba *, struct req_msg *, u16);
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+
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u32 req_head;
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u32 req_tail;
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u32 status_head;
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@@ -272,6 +304,7 @@ struct st_hba {
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void *copy_buffer; /* temp buffer for driver-handled commands */
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struct st_ccb *ccb;
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struct st_ccb *wait_ccb;
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+ __le32 *scratch;
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unsigned int mu_status;
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unsigned int cardtype;
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@@ -284,6 +317,9 @@ struct st_hba {
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};
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struct st_card_info {
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+ struct req_msg * (*alloc_rq) (struct st_hba *);
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+ int (*map_sg)(struct st_hba *, struct req_msg *, struct st_ccb *);
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+ void (*send) (struct st_hba *, struct req_msg *, u16);
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unsigned int max_id;
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unsigned int max_lun;
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unsigned int max_channel;
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@@ -352,6 +388,12 @@ static struct req_msg *stex_alloc_req(struct st_hba *hba)
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return req;
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}
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+static struct req_msg *stex_ss_alloc_req(struct st_hba *hba)
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+{
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+ return (struct req_msg *)(hba->dma_mem +
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+ hba->req_head * hba->rq_size + sizeof(struct st_msg_header));
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+}
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+
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static int stex_map_sg(struct st_hba *hba,
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struct req_msg *req, struct st_ccb *ccb)
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{
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@@ -384,6 +426,39 @@ static int stex_map_sg(struct st_hba *hba,
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return nseg;
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}
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+static int stex_ss_map_sg(struct st_hba *hba,
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+ struct req_msg *req, struct st_ccb *ccb)
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+{
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+ struct scsi_cmnd *cmd;
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+ struct scatterlist *sg;
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+ struct st_sgtable *dst;
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+ struct st_ss_sgitem *table;
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+ int i, nseg;
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+
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+ cmd = ccb->cmd;
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+ nseg = scsi_dma_map(cmd);
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+ BUG_ON(nseg < 0);
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+ if (nseg) {
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+ dst = (struct st_sgtable *)req->variable;
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+
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+ ccb->sg_count = nseg;
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+ dst->sg_count = cpu_to_le16((u16)nseg);
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+ dst->max_sg_count = cpu_to_le16(hba->host->sg_tablesize);
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+ dst->sz_in_byte = cpu_to_le32(scsi_bufflen(cmd));
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+
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+ table = (struct st_ss_sgitem *)(dst + 1);
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+ scsi_for_each_sg(cmd, sg, nseg, i) {
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+ table[i].count = cpu_to_le32((u32)sg_dma_len(sg));
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+ table[i].addr =
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+ cpu_to_le32(sg_dma_address(sg) & 0xffffffff);
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+ table[i].addr_hi =
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+ cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
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+ }
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+ }
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+
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+ return nseg;
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+}
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+
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static void stex_controller_info(struct st_hba *hba, struct st_ccb *ccb)
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{
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struct st_frame *p;
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@@ -424,6 +499,37 @@ stex_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag)
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readl(hba->mmio_base + IDBL); /* flush */
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}
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+static void
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+stex_ss_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag)
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+{
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+ struct scsi_cmnd *cmd;
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+ struct st_msg_header *msg_h;
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+ dma_addr_t addr;
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+
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+ req->tag = cpu_to_le16(tag);
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+
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+ hba->ccb[tag].req = req;
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+ hba->out_req_cnt++;
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+
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+ cmd = hba->ccb[tag].cmd;
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+ msg_h = (struct st_msg_header *)req - 1;
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+ if (likely(cmd)) {
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+ msg_h->channel = (u8)cmd->device->channel;
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+ msg_h->timeout = cpu_to_le16(cmd->request->timeout/HZ);
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+ }
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+ addr = hba->dma_handle + hba->req_head * hba->rq_size;
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+ addr += (hba->ccb[tag].sg_count+4)/11;
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+ msg_h->handle = cpu_to_le64(addr);
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+
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+ ++hba->req_head;
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+ hba->req_head %= hba->rq_count+1;
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+
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+ writel((addr >> 16) >> 16, hba->mmio_base + YH2I_REQ_HI);
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+ readl(hba->mmio_base + YH2I_REQ_HI); /* flush */
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+ writel(addr, hba->mmio_base + YH2I_REQ);
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+ readl(hba->mmio_base + YH2I_REQ); /* flush */
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+}
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+
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static int
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stex_slave_alloc(struct scsi_device *sdev)
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{
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@@ -504,7 +610,8 @@ stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
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case INQUIRY:
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if (id != host->max_id - 1)
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break;
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- if (lun == 0 && (cmd->cmnd[1] & INQUIRY_EVPD) == 0) {
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+ if (!lun && !cmd->device->channel &&
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+ (cmd->cmnd[1] & INQUIRY_EVPD) == 0) {
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scsi_sg_copy_from_buffer(cmd, (void *)console_inq_page,
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sizeof(console_inq_page));
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cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
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@@ -542,7 +649,7 @@ stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
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if (unlikely(tag >= host->can_queue))
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return SCSI_MLQUEUE_HOST_BUSY;
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- req = stex_alloc_req(hba);
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+ req = hba->alloc_rq(hba);
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req->lun = lun;
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req->target = id;
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@@ -561,10 +668,12 @@ stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
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hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE;
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hba->ccb[tag].sense_buffer = cmd->sense_buffer;
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- if (cmd->sc_data_direction != DMA_NONE)
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- stex_map_sg(hba, req, &hba->ccb[tag]);
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+ if (!hba->map_sg(hba, req, &hba->ccb[tag])) {
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+ hba->ccb[tag].sg_count = 0;
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+ memset(&req->variable[0], 0, 8);
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+ }
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- stex_send_cmd(hba, req, tag);
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+ hba->send(hba, req, tag);
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return 0;
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}
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@@ -746,7 +855,103 @@ static irqreturn_t stex_intr(int irq, void *__hba)
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return IRQ_RETVAL(handled);
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}
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-static int stex_handshake(struct st_hba *hba)
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+static void stex_ss_mu_intr(struct st_hba *hba)
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+{
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+ struct status_msg *resp;
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+ struct st_ccb *ccb;
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+ __le32 *scratch;
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+ unsigned int size;
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+ int count = 0;
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+ u32 value;
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+ u16 tag;
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+
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+ if (unlikely(hba->out_req_cnt <= 0 ||
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+ hba->mu_status == MU_STATE_RESETTING))
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+ return;
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+
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+ while (count < hba->sts_count) {
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+ scratch = hba->scratch + hba->status_tail;
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+ value = le32_to_cpu(*scratch);
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+ if (unlikely(!(value & SS_STS_NORMAL)))
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+ return;
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+
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+ resp = hba->status_buffer + hba->status_tail;
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+ *scratch = 0;
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+ ++count;
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+ ++hba->status_tail;
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+ hba->status_tail %= hba->sts_count+1;
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+
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+ tag = (u16)value;
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+ if (unlikely(tag >= hba->host->can_queue)) {
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+ printk(KERN_WARNING DRV_NAME
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+ "(%s): invalid tag\n", pci_name(hba->pdev));
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+ continue;
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+ }
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+
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+ hba->out_req_cnt--;
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+ ccb = &hba->ccb[tag];
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+ if (unlikely(hba->wait_ccb == ccb))
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+ hba->wait_ccb = NULL;
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+ if (unlikely(ccb->req == NULL)) {
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+ printk(KERN_WARNING DRV_NAME
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+ "(%s): lagging req\n", pci_name(hba->pdev));
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+ continue;
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+ }
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+
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+ ccb->req = NULL;
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+ if (likely(value & SS_STS_DONE)) { /* normal case */
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+ ccb->srb_status = SRB_STATUS_SUCCESS;
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+ ccb->scsi_status = SAM_STAT_GOOD;
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+ } else {
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+ ccb->srb_status = resp->srb_status;
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+ ccb->scsi_status = resp->scsi_status;
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+ size = resp->payload_sz * sizeof(u32);
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+ if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN ||
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+ size > sizeof(*resp))) {
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+ printk(KERN_WARNING DRV_NAME
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+ "(%s): bad status size\n",
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+ pci_name(hba->pdev));
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+ } else {
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+ size -= sizeof(*resp) - STATUS_VAR_LEN;
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+ if (size)
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+ stex_copy_data(ccb, resp, size);
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+ }
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+ if (likely(ccb->cmd != NULL))
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+ stex_check_cmd(hba, ccb, resp);
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+ }
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+
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+ if (likely(ccb->cmd != NULL)) {
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+ scsi_dma_unmap(ccb->cmd);
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+ stex_scsi_done(ccb);
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+ } else
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+ ccb->req_type = 0;
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+ }
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+}
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+
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+static irqreturn_t stex_ss_intr(int irq, void *__hba)
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+{
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+ struct st_hba *hba = __hba;
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+ void __iomem *base = hba->mmio_base;
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+ u32 data;
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+ unsigned long flags;
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+ int handled = 0;
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+
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+ spin_lock_irqsave(hba->host->host_lock, flags);
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+
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+ data = readl(base + YI2H_INT);
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+ if (data && data != 0xffffffff) {
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+ /* clear the interrupt */
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+ writel(data, base + YI2H_INT_C);
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+ stex_ss_mu_intr(hba);
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+ handled = 1;
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+ }
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+
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+ spin_unlock_irqrestore(hba->host->host_lock, flags);
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+
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+ return IRQ_RETVAL(handled);
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+}
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+
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+static int stex_common_handshake(struct st_hba *hba)
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{
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void __iomem *base = hba->mmio_base;
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struct handshake_frame *h;
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@@ -827,10 +1032,79 @@ static int stex_handshake(struct st_hba *hba)
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readl(base + IMR1);
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writel(0, base + OMR1);
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readl(base + OMR1); /* flush */
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- hba->mu_status = MU_STATE_STARTED;
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return 0;
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}
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+static int stex_ss_handshake(struct st_hba *hba)
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+{
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+ void __iomem *base = hba->mmio_base;
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+ struct st_msg_header *msg_h;
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+ struct handshake_frame *h;
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+ __le32 *scratch = hba->scratch;
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+ u32 data;
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+ unsigned long before;
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+ int ret = 0;
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+
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+ h = (struct handshake_frame *)(hba->alloc_rq(hba));
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+ msg_h = (struct st_msg_header *)h - 1;
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+ msg_h->handle = cpu_to_le64(hba->dma_handle);
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+ msg_h->flag = SS_HEAD_HANDSHAKE;
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+
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+ h->rb_phy = cpu_to_le64(hba->dma_handle);
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+ h->req_sz = cpu_to_le16(hba->rq_size);
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+ h->req_cnt = cpu_to_le16(hba->rq_count+1);
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+ h->status_sz = cpu_to_le16(sizeof(struct status_msg));
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+ h->status_cnt = cpu_to_le16(hba->sts_count+1);
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+ stex_gettime(&h->hosttime);
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+ h->partner_type = HMU_PARTNER_TYPE;
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+ h->extra_offset = h->extra_size = 0;
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+ h->scratch_size = cpu_to_le32((hba->sts_count+1)*sizeof(u32));
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+
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+ data = readl(base + YINT_EN);
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+ data &= ~4;
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+ writel(data, base + YINT_EN);
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+ writel((hba->dma_handle >> 16) >> 16, base + YH2I_REQ_HI);
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+ writel(hba->dma_handle, base + YH2I_REQ);
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+
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+ scratch = hba->scratch;
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+ before = jiffies;
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+ while (!(le32_to_cpu(*scratch) & SS_STS_HANDSHAKE)) {
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+ if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
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+ printk(KERN_ERR DRV_NAME
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+ "(%s): no signature after handshake frame\n",
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+ pci_name(hba->pdev));
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+ ret = -1;
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+ break;
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+ }
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+ rmb();
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+ msleep(1);
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+ }
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+
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|
+ *scratch = 0;
|
|
|
+ msg_h->flag = 0;
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int stex_handshake(struct st_hba *hba)
|
|
|
+{
|
|
|
+ int err;
|
|
|
+ unsigned long flags;
|
|
|
+
|
|
|
+ err = (hba->cardtype == st_yel) ?
|
|
|
+ stex_ss_handshake(hba) : stex_common_handshake(hba);
|
|
|
+ if (err == 0) {
|
|
|
+ spin_lock_irqsave(hba->host->host_lock, flags);
|
|
|
+ hba->req_head = 0;
|
|
|
+ hba->req_tail = 0;
|
|
|
+ hba->status_head = 0;
|
|
|
+ hba->status_tail = 0;
|
|
|
+ hba->out_req_cnt = 0;
|
|
|
+ hba->mu_status = MU_STATE_STARTED;
|
|
|
+ spin_unlock_irqrestore(hba->host->host_lock, flags);
|
|
|
+ }
|
|
|
+ return err;
|
|
|
+}
|
|
|
+
|
|
|
static int stex_abort(struct scsi_cmnd *cmd)
|
|
|
{
|
|
|
struct Scsi_Host *host = cmd->device->host;
|
|
@@ -859,15 +1133,23 @@ static int stex_abort(struct scsi_cmnd *cmd)
|
|
|
goto out;
|
|
|
}
|
|
|
|
|
|
- data = readl(base + ODBL);
|
|
|
- if (data == 0 || data == 0xffffffff)
|
|
|
- goto fail_out;
|
|
|
+ if (hba->cardtype == st_yel) {
|
|
|
+ data = readl(base + YI2H_INT);
|
|
|
+ if (data == 0 || data == 0xffffffff)
|
|
|
+ goto fail_out;
|
|
|
|
|
|
- writel(data, base + ODBL);
|
|
|
- readl(base + ODBL); /* flush */
|
|
|
+ writel(data, base + YI2H_INT_C);
|
|
|
+ stex_ss_mu_intr(hba);
|
|
|
+ } else {
|
|
|
+ data = readl(base + ODBL);
|
|
|
+ if (data == 0 || data == 0xffffffff)
|
|
|
+ goto fail_out;
|
|
|
|
|
|
- stex_mu_intr(hba, data);
|
|
|
+ writel(data, base + ODBL);
|
|
|
+ readl(base + ODBL); /* flush */
|
|
|
|
|
|
+ stex_mu_intr(hba, data);
|
|
|
+ }
|
|
|
if (hba->wait_ccb == NULL) {
|
|
|
printk(KERN_WARNING DRV_NAME
|
|
|
"(%s): lost interrupt\n", pci_name(hba->pdev));
|
|
@@ -947,13 +1229,6 @@ static int stex_reset(struct scsi_cmnd *cmd)
|
|
|
pci_name(hba->pdev));
|
|
|
return FAILED;
|
|
|
}
|
|
|
- spin_lock_irqsave(hba->host->host_lock, flags);
|
|
|
- hba->req_head = 0;
|
|
|
- hba->req_tail = 0;
|
|
|
- hba->status_head = 0;
|
|
|
- hba->status_tail = 0;
|
|
|
- hba->out_req_cnt = 0;
|
|
|
- spin_unlock_irqrestore(hba->host->host_lock, flags);
|
|
|
return SUCCESS;
|
|
|
}
|
|
|
|
|
@@ -1021,7 +1296,6 @@ static struct scsi_host_template driver_template = {
|
|
|
.eh_abort_handler = stex_abort,
|
|
|
.eh_host_reset_handler = stex_reset,
|
|
|
.this_id = -1,
|
|
|
- .sg_tablesize = ST_MAX_SG,
|
|
|
};
|
|
|
|
|
|
static struct pci_device_id stex_pci_tbl[] = {
|
|
@@ -1039,10 +1313,14 @@ static struct pci_device_id stex_pci_tbl[] = {
|
|
|
{ 0x105a, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc },
|
|
|
|
|
|
/* st_yosemite */
|
|
|
- { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_yosemite },
|
|
|
+ { 0x105a, 0x8650, 0x105a, PCI_ANY_ID, 0, 0, st_yosemite },
|
|
|
|
|
|
/* st_seq */
|
|
|
{ 0x105a, 0x3360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_seq },
|
|
|
+
|
|
|
+ /* st_yel */
|
|
|
+ { 0x105a, 0x8650, 0x1033, PCI_ANY_ID, 0, 0, st_yel },
|
|
|
+ { 0x105a, 0x8760, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_yel },
|
|
|
{ } /* terminate list */
|
|
|
};
|
|
|
|
|
@@ -1055,6 +1333,9 @@ static struct st_card_info stex_card_info[] = {
|
|
|
.rq_count = 32,
|
|
|
.rq_size = 1048,
|
|
|
.sts_count = 32,
|
|
|
+ .alloc_rq = stex_alloc_req,
|
|
|
+ .map_sg = stex_map_sg,
|
|
|
+ .send = stex_send_cmd,
|
|
|
},
|
|
|
|
|
|
/* st_vsc */
|
|
@@ -1065,6 +1346,9 @@ static struct st_card_info stex_card_info[] = {
|
|
|
.rq_count = 32,
|
|
|
.rq_size = 1048,
|
|
|
.sts_count = 32,
|
|
|
+ .alloc_rq = stex_alloc_req,
|
|
|
+ .map_sg = stex_map_sg,
|
|
|
+ .send = stex_send_cmd,
|
|
|
},
|
|
|
|
|
|
/* st_yosemite */
|
|
@@ -1075,6 +1359,9 @@ static struct st_card_info stex_card_info[] = {
|
|
|
.rq_count = 256,
|
|
|
.rq_size = 1048,
|
|
|
.sts_count = 256,
|
|
|
+ .alloc_rq = stex_alloc_req,
|
|
|
+ .map_sg = stex_map_sg,
|
|
|
+ .send = stex_send_cmd,
|
|
|
},
|
|
|
|
|
|
/* st_seq */
|
|
@@ -1085,6 +1372,22 @@ static struct st_card_info stex_card_info[] = {
|
|
|
.rq_count = 32,
|
|
|
.rq_size = 1048,
|
|
|
.sts_count = 32,
|
|
|
+ .alloc_rq = stex_alloc_req,
|
|
|
+ .map_sg = stex_map_sg,
|
|
|
+ .send = stex_send_cmd,
|
|
|
+ },
|
|
|
+
|
|
|
+ /* st_yel */
|
|
|
+ {
|
|
|
+ .max_id = 129,
|
|
|
+ .max_lun = 256,
|
|
|
+ .max_channel = 3,
|
|
|
+ .rq_count = 801,
|
|
|
+ .rq_size = 512,
|
|
|
+ .sts_count = 801,
|
|
|
+ .alloc_rq = stex_ss_alloc_req,
|
|
|
+ .map_sg = stex_ss_map_sg,
|
|
|
+ .send = stex_ss_send_cmd,
|
|
|
},
|
|
|
};
|
|
|
|
|
@@ -1117,7 +1420,8 @@ static int stex_request_irq(struct st_hba *hba)
|
|
|
} else
|
|
|
hba->msi_enabled = 0;
|
|
|
|
|
|
- status = request_irq(pdev->irq, stex_intr, IRQF_SHARED, DRV_NAME, hba);
|
|
|
+ status = request_irq(pdev->irq, hba->cardtype == st_yel ?
|
|
|
+ stex_ss_intr : stex_intr, IRQF_SHARED, DRV_NAME, hba);
|
|
|
|
|
|
if (status != 0) {
|
|
|
if (hba->msi_enabled)
|
|
@@ -1141,7 +1445,7 @@ stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
struct st_hba *hba;
|
|
|
struct Scsi_Host *host;
|
|
|
const struct st_card_info *ci = NULL;
|
|
|
- u32 sts_offset, cp_offset;
|
|
|
+ u32 sts_offset, cp_offset, scratch_offset;
|
|
|
int err;
|
|
|
|
|
|
err = pci_enable_device(pdev);
|
|
@@ -1186,7 +1490,9 @@ stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
|
|
|
hba->cardtype = (unsigned int) id->driver_data;
|
|
|
ci = &stex_card_info[hba->cardtype];
|
|
|
- sts_offset = (ci->rq_count+1) * ci->rq_size;
|
|
|
+ sts_offset = scratch_offset = (ci->rq_count+1) * ci->rq_size;
|
|
|
+ if (hba->cardtype == st_yel)
|
|
|
+ sts_offset += (ci->sts_count+1) * sizeof(u32);
|
|
|
cp_offset = sts_offset + (ci->sts_count+1) * sizeof(struct status_msg);
|
|
|
hba->dma_size = cp_offset + sizeof(struct st_frame);
|
|
|
if (hba->cardtype == st_seq ||
|
|
@@ -1211,13 +1517,22 @@ stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
goto out_pci_free;
|
|
|
}
|
|
|
|
|
|
+ if (hba->cardtype == st_yel)
|
|
|
+ hba->scratch = (__le32 *)(hba->dma_mem + scratch_offset);
|
|
|
hba->status_buffer = (struct status_msg *)(hba->dma_mem + sts_offset);
|
|
|
hba->copy_buffer = hba->dma_mem + cp_offset;
|
|
|
hba->rq_count = ci->rq_count;
|
|
|
hba->rq_size = ci->rq_size;
|
|
|
hba->sts_count = ci->sts_count;
|
|
|
+ hba->alloc_rq = ci->alloc_rq;
|
|
|
+ hba->map_sg = ci->map_sg;
|
|
|
+ hba->send = ci->send;
|
|
|
hba->mu_status = MU_STATE_STARTING;
|
|
|
|
|
|
+ if (hba->cardtype == st_yel)
|
|
|
+ host->sg_tablesize = 38;
|
|
|
+ else
|
|
|
+ host->sg_tablesize = 32;
|
|
|
host->can_queue = ci->rq_count;
|
|
|
host->cmd_per_lun = ci->rq_count;
|
|
|
host->max_id = ci->max_id;
|
|
@@ -1282,15 +1597,20 @@ out_disable:
|
|
|
static void stex_hba_stop(struct st_hba *hba)
|
|
|
{
|
|
|
struct req_msg *req;
|
|
|
+ struct st_msg_header *msg_h;
|
|
|
unsigned long flags;
|
|
|
unsigned long before;
|
|
|
u16 tag = 0;
|
|
|
|
|
|
spin_lock_irqsave(hba->host->host_lock, flags);
|
|
|
- req = stex_alloc_req(hba);
|
|
|
- memset(req->cdb, 0, STEX_CDB_LENGTH);
|
|
|
+ req = hba->alloc_rq(hba);
|
|
|
+ if (hba->cardtype == st_yel) {
|
|
|
+ msg_h = (struct st_msg_header *)req - 1;
|
|
|
+ memset(msg_h, 0, hba->rq_size);
|
|
|
+ } else
|
|
|
+ memset(req, 0, hba->rq_size);
|
|
|
|
|
|
- if (hba->cardtype == st_yosemite) {
|
|
|
+ if (hba->cardtype == st_yosemite || hba->cardtype == st_yel) {
|
|
|
req->cdb[0] = MGT_CMD;
|
|
|
req->cdb[1] = MGT_CMD_SIGNATURE;
|
|
|
req->cdb[2] = CTLR_CONFIG_CMD;
|
|
@@ -1307,7 +1627,7 @@ static void stex_hba_stop(struct st_hba *hba)
|
|
|
hba->ccb[tag].sense_buffer = NULL;
|
|
|
hba->ccb[tag].req_type = PASSTHRU_REQ_TYPE;
|
|
|
|
|
|
- stex_send_cmd(hba, req, tag);
|
|
|
+ hba->send(hba, req, tag);
|
|
|
spin_unlock_irqrestore(hba->host->host_lock, flags);
|
|
|
|
|
|
before = jiffies;
|