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@@ -33,14 +33,6 @@
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#include "regs.h"
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enum {
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- PMD_RSD = 10, /* PMA/PMD receive signal detect register */
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- PCS_STAT1_X = 24, /* 10GBASE-X PCS status 1 register */
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- PCS_STAT1_R = 32, /* 10GBASE-R PCS status 1 register */
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- XS_LN_STAT = 24 /* XS lane status register */
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-};
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-
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-enum {
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- AEL100X_TX_DISABLE = 9,
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AEL100X_TX_CONFIG1 = 0xc002,
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AEL1002_PWR_DOWN_HI = 0xc011,
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AEL1002_PWR_DOWN_LO = 0xc012,
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@@ -74,8 +66,8 @@ static int set_phy_regs(struct cphy *phy, const struct reg_val *rv)
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for (err = 0; rv->mmd_addr && !err; rv++) {
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if (rv->clear_bits == 0xffff)
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- err = mdio_write(phy, rv->mmd_addr, rv->reg_addr,
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- rv->set_bits);
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+ err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr,
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+ rv->set_bits);
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else
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err = t3_mdio_change_bits(phy, rv->mmd_addr,
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rv->reg_addr, rv->clear_bits,
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@@ -86,7 +78,8 @@ static int set_phy_regs(struct cphy *phy, const struct reg_val *rv)
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static void ael100x_txon(struct cphy *phy)
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{
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- int tx_on_gpio = phy->addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL;
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+ int tx_on_gpio =
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+ phy->mdio.prtad == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL;
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msleep(100);
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t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio);
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@@ -97,10 +90,11 @@ static int ael1002_power_down(struct cphy *phy, int enable)
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{
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int err;
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- err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable);
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+ err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, !!enable);
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if (!err)
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- err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
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- BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
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+ err = mdio_set_flag(&phy->mdio, phy->mdio.prtad,
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+ MDIO_MMD_PMAPMD, MDIO_CTRL1,
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+ MDIO_CTRL1_LPOWER, enable);
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return err;
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}
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@@ -109,11 +103,11 @@ static int ael1002_reset(struct cphy *phy, int wait)
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int err;
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if ((err = ael1002_power_down(phy, 0)) ||
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- (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) ||
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- (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) ||
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- (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) ||
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- (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) ||
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- (err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL1002_LB_EN,
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+ (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL100X_TX_CONFIG1, 1)) ||
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+ (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_PWR_DOWN_HI, 0)) ||
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+ (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_PWR_DOWN_LO, 0)) ||
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+ (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_XFI_EQL, 0x18)) ||
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+ (err = t3_mdio_change_bits(phy, MDIO_MMD_PMAPMD, AEL1002_LB_EN,
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0, 1 << 5)))
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return err;
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return 0;
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@@ -132,12 +126,15 @@ static int get_link_status_r(struct cphy *phy, int *link_ok, int *speed,
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{
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if (link_ok) {
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unsigned int stat0, stat1, stat2;
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- int err = mdio_read(phy, MDIO_DEV_PMA_PMD, PMD_RSD, &stat0);
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+ int err = t3_mdio_read(phy, MDIO_MMD_PMAPMD,
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+ MDIO_PMA_RXDET, &stat0);
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if (!err)
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- err = mdio_read(phy, MDIO_DEV_PCS, PCS_STAT1_R, &stat1);
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+ err = t3_mdio_read(phy, MDIO_MMD_PCS,
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+ MDIO_PCS_10GBRT_STAT1, &stat1);
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if (!err)
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- err = mdio_read(phy, MDIO_DEV_XGXS, XS_LN_STAT, &stat2);
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+ err = t3_mdio_read(phy, MDIO_MMD_PHYXS,
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+ MDIO_PHYXS_LNSTAT, &stat2);
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if (err)
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return err;
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*link_ok = (stat0 & stat1 & (stat2 >> 12)) & 1;
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@@ -157,6 +154,7 @@ static struct cphy_ops ael1002_ops = {
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.intr_handler = ael1002_intr_noop,
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.get_link_status = get_link_status_r,
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.power_down = ael1002_power_down,
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+ .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
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};
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int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter,
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@@ -171,13 +169,13 @@ int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter,
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static int ael1006_reset(struct cphy *phy, int wait)
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{
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- return t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait);
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+ return t3_phy_reset(phy, MDIO_MMD_PMAPMD, wait);
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}
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static int ael1006_power_down(struct cphy *phy, int enable)
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{
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- return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
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- BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
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+ return mdio_set_flag(&phy->mdio, phy->mdio.prtad, MDIO_MMD_PMAPMD,
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+ MDIO_CTRL1, MDIO_CTRL1_LPOWER, enable);
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}
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static struct cphy_ops ael1006_ops = {
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@@ -188,6 +186,7 @@ static struct cphy_ops ael1006_ops = {
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.intr_handler = t3_phy_lasi_intr_handler,
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.get_link_status = get_link_status_r,
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.power_down = ael1006_power_down,
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+ .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
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};
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int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
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@@ -203,9 +202,9 @@ int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
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static int ael2005_setup_sr_edc(struct cphy *phy)
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{
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static struct reg_val regs[] = {
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- { MDIO_DEV_PMA_PMD, 0xc003, 0xffff, 0x181 },
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- { MDIO_DEV_PMA_PMD, 0xc010, 0xffff, 0x448a },
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- { MDIO_DEV_PMA_PMD, 0xc04a, 0xffff, 0x5200 },
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+ { MDIO_MMD_PMAPMD, 0xc003, 0xffff, 0x181 },
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+ { MDIO_MMD_PMAPMD, 0xc010, 0xffff, 0x448a },
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+ { MDIO_MMD_PMAPMD, 0xc04a, 0xffff, 0x5200 },
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{ 0, 0, 0, 0 }
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};
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static u16 sr_edc[] = {
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@@ -490,8 +489,8 @@ static int ael2005_setup_sr_edc(struct cphy *phy)
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msleep(50);
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for (i = 0; i < ARRAY_SIZE(sr_edc) && !err; i += 2)
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- err = mdio_write(phy, MDIO_DEV_PMA_PMD, sr_edc[i],
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- sr_edc[i + 1]);
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+ err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, sr_edc[i],
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+ sr_edc[i + 1]);
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if (!err)
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phy->priv = edc_sr;
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return err;
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@@ -500,12 +499,12 @@ static int ael2005_setup_sr_edc(struct cphy *phy)
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static int ael2005_setup_twinax_edc(struct cphy *phy, int modtype)
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{
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static struct reg_val regs[] = {
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- { MDIO_DEV_PMA_PMD, 0xc04a, 0xffff, 0x5a00 },
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+ { MDIO_MMD_PMAPMD, 0xc04a, 0xffff, 0x5a00 },
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{ 0, 0, 0, 0 }
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};
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static struct reg_val preemphasis[] = {
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- { MDIO_DEV_PMA_PMD, 0xc014, 0xffff, 0xfe16 },
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- { MDIO_DEV_PMA_PMD, 0xc015, 0xffff, 0xa000 },
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+ { MDIO_MMD_PMAPMD, 0xc014, 0xffff, 0xfe16 },
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+ { MDIO_MMD_PMAPMD, 0xc015, 0xffff, 0xa000 },
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{ 0, 0, 0, 0 }
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};
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static u16 twinax_edc[] = {
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@@ -887,8 +886,8 @@ static int ael2005_setup_twinax_edc(struct cphy *phy, int modtype)
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msleep(50);
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for (i = 0; i < ARRAY_SIZE(twinax_edc) && !err; i += 2)
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- err = mdio_write(phy, MDIO_DEV_PMA_PMD, twinax_edc[i],
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- twinax_edc[i + 1]);
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+ err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, twinax_edc[i],
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+ twinax_edc[i + 1]);
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if (!err)
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phy->priv = edc_twinax;
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return err;
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@@ -899,26 +898,26 @@ static int ael2005_i2c_rd(struct cphy *phy, int dev_addr, int word_addr)
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int i, err;
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unsigned int stat, data;
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- err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL_I2C_CTRL,
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- (dev_addr << 8) | (1 << 8) | word_addr);
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+ err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL_I2C_CTRL,
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+ (dev_addr << 8) | (1 << 8) | word_addr);
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if (err)
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return err;
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for (i = 0; i < 5; i++) {
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msleep(1);
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- err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL_I2C_STAT, &stat);
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+ err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL_I2C_STAT, &stat);
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if (err)
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return err;
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if ((stat & 3) == 1) {
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- err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL_I2C_DATA,
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- &data);
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+ err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL_I2C_DATA,
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+ &data);
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if (err)
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return err;
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return data >> 8;
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}
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}
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CH_WARN(phy->adapter, "PHY %u I2C read of addr %u timed out\n",
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- phy->addr, word_addr);
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+ phy->mdio.prtad, word_addr);
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return -ETIMEDOUT;
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}
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@@ -927,7 +926,7 @@ static int get_module_type(struct cphy *phy, int delay_ms)
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int v;
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unsigned int stat;
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- v = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, &stat);
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+ v = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, &stat);
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if (v)
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return v;
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@@ -971,48 +970,48 @@ unknown:
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static int ael2005_intr_enable(struct cphy *phy)
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{
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- int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0x200);
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+ int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, 0x200);
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return err ? err : t3_phy_lasi_intr_enable(phy);
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}
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static int ael2005_intr_disable(struct cphy *phy)
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{
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- int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0x100);
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+ int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, 0x100);
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return err ? err : t3_phy_lasi_intr_disable(phy);
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}
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static int ael2005_intr_clear(struct cphy *phy)
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{
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- int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0xd00);
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+ int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, 0xd00);
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return err ? err : t3_phy_lasi_intr_clear(phy);
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}
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static int ael2005_reset(struct cphy *phy, int wait)
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{
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static struct reg_val regs0[] = {
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- { MDIO_DEV_PMA_PMD, 0xc001, 0, 1 << 5 },
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- { MDIO_DEV_PMA_PMD, 0xc017, 0, 1 << 5 },
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- { MDIO_DEV_PMA_PMD, 0xc013, 0xffff, 0xf341 },
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- { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0x8000 },
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- { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0x8100 },
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- { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0x8000 },
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- { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0 },
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+ { MDIO_MMD_PMAPMD, 0xc001, 0, 1 << 5 },
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+ { MDIO_MMD_PMAPMD, 0xc017, 0, 1 << 5 },
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+ { MDIO_MMD_PMAPMD, 0xc013, 0xffff, 0xf341 },
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+ { MDIO_MMD_PMAPMD, 0xc210, 0xffff, 0x8000 },
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+ { MDIO_MMD_PMAPMD, 0xc210, 0xffff, 0x8100 },
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+ { MDIO_MMD_PMAPMD, 0xc210, 0xffff, 0x8000 },
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+ { MDIO_MMD_PMAPMD, 0xc210, 0xffff, 0 },
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{ 0, 0, 0, 0 }
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};
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static struct reg_val regs1[] = {
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- { MDIO_DEV_PMA_PMD, 0xca00, 0xffff, 0x0080 },
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- { MDIO_DEV_PMA_PMD, 0xca12, 0xffff, 0 },
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+ { MDIO_MMD_PMAPMD, 0xca00, 0xffff, 0x0080 },
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+ { MDIO_MMD_PMAPMD, 0xca12, 0xffff, 0 },
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{ 0, 0, 0, 0 }
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};
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int err;
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unsigned int lasi_ctrl;
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- err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, &lasi_ctrl);
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+ err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, LASI_CTRL, &lasi_ctrl);
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if (err)
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return err;
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- err = t3_phy_reset(phy, MDIO_DEV_PMA_PMD, 0);
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+ err = t3_phy_reset(phy, MDIO_MMD_PMAPMD, 0);
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if (err)
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return err;
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@@ -1051,13 +1050,13 @@ static int ael2005_intr_handler(struct cphy *phy)
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unsigned int stat;
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int ret, edc_needed, cause = 0;
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- ret = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_STAT, &stat);
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+ ret = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_STAT, &stat);
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if (ret)
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return ret;
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if (stat & AEL2005_MODDET_IRQ) {
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- ret = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL,
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- 0xd00);
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+ ret = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL,
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+ 0xd00);
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if (ret)
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return ret;
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@@ -1098,6 +1097,7 @@ static struct cphy_ops ael2005_ops = {
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.intr_handler = ael2005_intr_handler,
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.get_link_status = get_link_status_r,
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.power_down = ael1002_power_down,
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+ .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
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};
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int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter,
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@@ -1107,7 +1107,7 @@ int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter,
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SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE |
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SUPPORTED_IRQ, "10GBASE-R");
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msleep(125);
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- return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL_OPT_SETTINGS, 0,
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+ return t3_mdio_change_bits(phy, MDIO_MMD_PMAPMD, AEL_OPT_SETTINGS, 0,
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1 << 5);
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}
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@@ -1119,12 +1119,15 @@ static int get_link_status_x(struct cphy *phy, int *link_ok, int *speed,
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{
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if (link_ok) {
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unsigned int stat0, stat1, stat2;
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- int err = mdio_read(phy, MDIO_DEV_PMA_PMD, PMD_RSD, &stat0);
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+ int err = t3_mdio_read(phy, MDIO_MMD_PMAPMD,
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+ MDIO_PMA_RXDET, &stat0);
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if (!err)
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- err = mdio_read(phy, MDIO_DEV_PCS, PCS_STAT1_X, &stat1);
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|
+ err = t3_mdio_read(phy, MDIO_MMD_PCS,
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|
+ MDIO_PCS_10GBX_STAT1, &stat1);
|
|
|
if (!err)
|
|
|
- err = mdio_read(phy, MDIO_DEV_XGXS, XS_LN_STAT, &stat2);
|
|
|
+ err = t3_mdio_read(phy, MDIO_MMD_PHYXS,
|
|
|
+ MDIO_PHYXS_LNSTAT, &stat2);
|
|
|
if (err)
|
|
|
return err;
|
|
|
*link_ok = (stat0 & (stat1 >> 12) & (stat2 >> 12)) & 1;
|
|
@@ -1144,6 +1147,7 @@ static struct cphy_ops qt2045_ops = {
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.intr_handler = t3_phy_lasi_intr_handler,
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|
.get_link_status = get_link_status_x,
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|
|
.power_down = ael1006_power_down,
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|
|
+ .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
|
|
|
};
|
|
|
|
|
|
int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter,
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|
@@ -1159,9 +1163,10 @@ int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter,
|
|
|
* Some cards where the PHY is supposed to be at address 0 actually
|
|
|
* have it at 1.
|
|
|
*/
|
|
|
- if (!phy_addr && !mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &stat) &&
|
|
|
+ if (!phy_addr &&
|
|
|
+ !t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &stat) &&
|
|
|
stat == 0xffff)
|
|
|
- phy->addr = 1;
|
|
|
+ phy->mdio.prtad = 1;
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
@@ -1175,15 +1180,16 @@ static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok,
|
|
|
{
|
|
|
if (link_ok) {
|
|
|
unsigned int status;
|
|
|
+ int prtad = phy->mdio.prtad;
|
|
|
|
|
|
status = t3_read_reg(phy->adapter,
|
|
|
- XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) |
|
|
|
+ XGM_REG(A_XGM_SERDES_STAT0, prtad)) |
|
|
|
t3_read_reg(phy->adapter,
|
|
|
- XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) |
|
|
|
+ XGM_REG(A_XGM_SERDES_STAT1, prtad)) |
|
|
|
t3_read_reg(phy->adapter,
|
|
|
- XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) |
|
|
|
+ XGM_REG(A_XGM_SERDES_STAT2, prtad)) |
|
|
|
t3_read_reg(phy->adapter,
|
|
|
- XGM_REG(A_XGM_SERDES_STAT3, phy->addr));
|
|
|
+ XGM_REG(A_XGM_SERDES_STAT3, prtad));
|
|
|
*link_ok = !(status & F_LOWSIG0);
|
|
|
}
|
|
|
if (speed)
|
|
@@ -1211,7 +1217,7 @@ static struct cphy_ops xaui_direct_ops = {
|
|
|
int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
|
|
|
int phy_addr, const struct mdio_ops *mdio_ops)
|
|
|
{
|
|
|
- cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops,
|
|
|
+ cphy_init(phy, adapter, MDIO_PRTAD_NONE, &xaui_direct_ops, mdio_ops,
|
|
|
SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_TP,
|
|
|
"10GBASE-CX4");
|
|
|
return 0;
|