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@@ -116,7 +116,7 @@
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#define CX18_DEFAULT_ENC_PCM_BUFFERS 1
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/* Maximum firmware DMA buffers per stream */
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-#define CX18_MAX_MDLS_PER_STREAM 63
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+#define CX18_MAX_FW_MDLS_PER_STREAM 63
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/* DMA buffer, default size in kB allocated */
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#define CX18_DEFAULT_ENC_TS_BUFSIZE 32
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@@ -255,7 +255,8 @@ struct cx18_scb; /* forward reference */
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#define CX18_MAX_MDL_ACKS 2
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-#define CX18_MAX_EPU_WORK_ORDERS 70 /* CPU_DE_RELEASE_MDL bursts 63 commands */
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+#define CX18_MAX_EPU_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7)
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+/* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */
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#define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1
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#define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2
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