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@@ -137,8 +137,9 @@
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#define HV_PM_CTRL PHY_REG(770, 17)
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/* PHY Low Power Idle Control */
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-#define I82579_LPI_CTRL PHY_REG(772, 20)
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-#define I82579_LPI_CTRL_ENABLE_MASK 0x6000
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+#define I82579_LPI_CTRL PHY_REG(772, 20)
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+#define I82579_LPI_CTRL_ENABLE_MASK 0x6000
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+#define I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT 0x80
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/* EMI Registers */
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#define I82579_EMI_ADDR 0x10
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@@ -1670,6 +1671,7 @@ static s32 e1000_k1_workaround_lv(struct e1000_hw *hw)
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s32 ret_val = 0;
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u16 status_reg = 0;
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u32 mac_reg;
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+ u16 phy_reg;
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if (hw->mac.type != e1000_pch2lan)
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goto out;
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@@ -1684,12 +1686,19 @@ static s32 e1000_k1_workaround_lv(struct e1000_hw *hw)
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mac_reg = er32(FEXTNVM4);
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mac_reg &= ~E1000_FEXTNVM4_BEACON_DURATION_MASK;
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- if (status_reg & HV_M_STATUS_SPEED_1000)
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+ ret_val = e1e_rphy(hw, I82579_LPI_CTRL, &phy_reg);
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+ if (ret_val)
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+ goto out;
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+
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+ if (status_reg & HV_M_STATUS_SPEED_1000) {
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mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_8USEC;
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- else
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+ phy_reg &= ~I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT;
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+ } else {
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mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_16USEC;
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-
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+ phy_reg |= I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT;
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+ }
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ew32(FEXTNVM4, mac_reg);
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+ ret_val = e1e_wphy(hw, I82579_LPI_CTRL, phy_reg);
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}
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out:
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