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@@ -0,0 +1,298 @@
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+/*
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+ * AD7923 SPI ADC driver
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+ *
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+ * Copyright 2011 Analog Devices Inc (from AD7923 Driver)
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+ * Copyright 2012 CS Systemes d'Information
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+ *
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+ * Licensed under the GPL-2.
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+ */
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+
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+#include <linux/device.h>
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+#include <linux/kernel.h>
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+#include <linux/slab.h>
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+#include <linux/sysfs.h>
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+#include <linux/spi/spi.h>
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+#include <linux/err.h>
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+#include <linux/delay.h>
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+#include <linux/module.h>
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+#include <linux/interrupt.h>
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+
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+#include <linux/iio/iio.h>
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+#include <linux/iio/sysfs.h>
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+#include <linux/iio/buffer.h>
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+#include <linux/iio/trigger_consumer.h>
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+#include <linux/iio/triggered_buffer.h>
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+
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+#define AD7923_WRITE_CR (1 << 11) /* write control register */
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+#define AD7923_RANGE (1 << 1) /* range to REFin */
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+#define AD7923_CODING (1 << 0) /* coding is straight binary */
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+#define AD7923_PM_MODE_AS (1) /* auto shutdown */
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+#define AD7923_PM_MODE_FS (2) /* full shutdown */
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+#define AD7923_PM_MODE_OPS (3) /* normal operation */
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+#define AD7923_CHANNEL_0 (0) /* analog input 0 */
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+#define AD7923_CHANNEL_1 (1) /* analog input 1 */
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+#define AD7923_CHANNEL_2 (2) /* analog input 2 */
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+#define AD7923_CHANNEL_3 (3) /* analog input 3 */
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+#define AD7923_SEQUENCE_OFF (0) /* no sequence fonction */
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+#define AD7923_SEQUENCE_PROTECT (2) /* no interrupt write cycle */
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+#define AD7923_SEQUENCE_ON (3) /* continuous sequence */
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+
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+#define AD7923_MAX_CHAN 4
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+
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+#define AD7923_PM_MODE_WRITE(mode) (mode << 4) /* write mode */
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+#define AD7923_CHANNEL_WRITE(channel) (channel << 6) /* write channel */
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+#define AD7923_SEQUENCE_WRITE(sequence) (((sequence & 1) << 3) \
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+ + ((sequence & 2) << 9))
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+ /* write sequence fonction */
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+/* left shift for CR : bit 11 transmit in first */
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+#define AD7923_SHIFT_REGISTER 4
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+
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+/* val = value, dec = left shift, bits = number of bits of the mask */
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+#define EXTRACT(val, dec, bits) ((val >> dec) & ((1 << bits) - 1))
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+
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+struct ad7923_state {
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+ struct spi_device *spi;
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+ struct spi_transfer ring_xfer[5];
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+ struct spi_transfer scan_single_xfer[2];
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+ struct spi_message ring_msg;
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+ struct spi_message scan_single_msg;
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+ /*
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+ * DMA (thus cache coherency maintenance) requires the
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+ * transfer buffers to live in their own cache lines.
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+ */
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+ __be16 rx_buf[4] ____cacheline_aligned;
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+ __be16 tx_buf[4];
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+};
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+
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+#define AD7923_V_CHAN(index) \
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+ { \
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+ .type = IIO_VOLTAGE, \
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+ .indexed = 1, \
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+ .channel = index, \
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+ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
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+ IIO_CHAN_INFO_SCALE_SHARED_BIT, \
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+ .address = index, \
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+ .scan_index = index, \
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+ .scan_type = { \
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+ .sign = 'u', \
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+ .realbits = 12, \
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+ .storagebits = 16, \
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+ .endianness = IIO_BE, \
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+ }, \
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+ }
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+
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+static const struct iio_chan_spec ad7923_channels[] = {
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+ AD7923_V_CHAN(0),
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+ AD7923_V_CHAN(1),
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+ AD7923_V_CHAN(2),
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+ AD7923_V_CHAN(3),
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+ IIO_CHAN_SOFT_TIMESTAMP(4),
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+};
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+
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+/**
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+ * ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask
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+ **/
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+static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
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+ const unsigned long *active_scan_mask)
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+{
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+ struct ad7923_state *st = iio_priv(indio_dev);
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+ int i, cmd, len;
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+
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+ len = 0;
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+ for_each_set_bit(i, active_scan_mask, AD7923_MAX_CHAN) {
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+ cmd = AD7923_WRITE_CR | AD7923_CODING | AD7923_RANGE |
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+ AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS) |
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+ AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
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+ AD7923_CHANNEL_WRITE(i);
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+ cmd <<= AD7923_SHIFT_REGISTER;
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+ st->tx_buf[len++] = cpu_to_be16(cmd);
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+ }
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+ /* build spi ring message */
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+ st->ring_xfer[0].tx_buf = &st->tx_buf[0];
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+ st->ring_xfer[0].len = len;
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+ st->ring_xfer[0].cs_change = 1;
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+
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+ spi_message_init(&st->ring_msg);
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+ spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
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+
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+ for (i = 0; i < len; i++) {
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+ st->ring_xfer[i + 1].rx_buf = &st->rx_buf[i];
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+ st->ring_xfer[i + 1].len = 2;
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+ st->ring_xfer[i + 1].cs_change = 1;
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+ spi_message_add_tail(&st->ring_xfer[i + 1], &st->ring_msg);
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+ }
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+ /* make sure last transfer cs_change is not set */
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+ st->ring_xfer[i + 1].cs_change = 0;
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+
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+ return 0;
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+}
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+
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+/**
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+ * ad7923_trigger_handler() bh of trigger launched polling to ring buffer
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+ *
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+ * Currently there is no option in this driver to disable the saving of
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+ * timestamps within the ring.
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+ **/
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+static irqreturn_t ad7923_trigger_handler(int irq, void *p)
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+{
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+ struct iio_poll_func *pf = p;
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+ struct iio_dev *indio_dev = pf->indio_dev;
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+ struct ad7923_state *st = iio_priv(indio_dev);
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+ s64 time_ns = 0;
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+ int b_sent;
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+
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+ b_sent = spi_sync(st->spi, &st->ring_msg);
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+ if (b_sent)
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+ goto done;
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+
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+ if (indio_dev->scan_timestamp) {
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+ time_ns = iio_get_time_ns();
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+ memcpy((u8 *)st->rx_buf + indio_dev->scan_bytes - sizeof(s64),
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+ &time_ns, sizeof(time_ns));
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+ }
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+
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+ iio_push_to_buffers(indio_dev, (u8 *)st->rx_buf);
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+
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+done:
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+ iio_trigger_notify_done(indio_dev->trig);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static int ad7923_scan_direct(struct ad7923_state *st, unsigned ch)
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+{
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+ int ret, cmd;
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+
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+ cmd = AD7923_WRITE_CR | AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS) |
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+ AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) | AD7923_CODING |
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+ AD7923_CHANNEL_WRITE(ch) | AD7923_RANGE;
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+ cmd <<= AD7923_SHIFT_REGISTER;
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+ st->tx_buf[0] = cpu_to_be16(cmd);
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+
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+ ret = spi_sync(st->spi, &st->scan_single_msg);
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+ if (ret)
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+ return ret;
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+
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+ return be16_to_cpu(st->rx_buf[0]);
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+}
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+
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+static int ad7923_read_raw(struct iio_dev *indio_dev,
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+ struct iio_chan_spec const *chan,
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+ int *val,
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+ int *val2,
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+ long m)
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+{
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+ int ret;
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+ struct ad7923_state *st = iio_priv(indio_dev);
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+
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+ switch (m) {
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+ case IIO_CHAN_INFO_RAW:
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+ mutex_lock(&indio_dev->mlock);
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+ if (iio_buffer_enabled(indio_dev))
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+ ret = -EBUSY;
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+ else
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+ ret = ad7923_scan_direct(st, chan->address);
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+ mutex_unlock(&indio_dev->mlock);
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+
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+ if (ret < 0)
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+ return ret;
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+
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+ if (chan->address == EXTRACT(ret, 12, 4))
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+ *val = EXTRACT(ret, 0, 12);
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+
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+ return IIO_VAL_INT;
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+ }
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+ return -EINVAL;
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+}
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+
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+static const struct iio_info ad7923_info = {
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+ .read_raw = &ad7923_read_raw,
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+ .update_scan_mode = ad7923_update_scan_mode,
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+ .driver_module = THIS_MODULE,
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+};
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+
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+static int ad7923_probe(struct spi_device *spi)
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+{
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+ struct ad7923_state *st;
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+ struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
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+ int ret;
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+
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+ if (indio_dev == NULL)
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+ return -ENOMEM;
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+
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+ st = iio_priv(indio_dev);
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+
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+ spi_set_drvdata(spi, indio_dev);
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+
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+ st->spi = spi;
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+
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+ indio_dev->name = spi_get_device_id(spi)->name;
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+ indio_dev->dev.parent = &spi->dev;
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+ indio_dev->modes = INDIO_DIRECT_MODE;
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+ indio_dev->channels = ad7923_channels;
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+ indio_dev->num_channels = ARRAY_SIZE(ad7923_channels);
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+ indio_dev->info = &ad7923_info;
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+
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+ /* Setup default message */
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+
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+ st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
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+ st->scan_single_xfer[0].len = 2;
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+ st->scan_single_xfer[0].cs_change = 1;
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+ st->scan_single_xfer[1].rx_buf = &st->rx_buf[0];
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+ st->scan_single_xfer[1].len = 2;
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+
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+ spi_message_init(&st->scan_single_msg);
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+ spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
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+ spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
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+
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+ ret = iio_triggered_buffer_setup(indio_dev, NULL,
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+ &ad7923_trigger_handler, NULL);
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+ if (ret)
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+ goto error_free;
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+
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+ ret = iio_device_register(indio_dev);
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+ if (ret)
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+ goto error_cleanup_ring;
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+
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+ return 0;
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+
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+error_cleanup_ring:
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+ iio_triggered_buffer_cleanup(indio_dev);
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+error_free:
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+ iio_device_free(indio_dev);
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+
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+ return ret;
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+}
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+
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+static int ad7923_remove(struct spi_device *spi)
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+{
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+ struct iio_dev *indio_dev = spi_get_drvdata(spi);
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+
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+ iio_device_unregister(indio_dev);
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+ iio_triggered_buffer_cleanup(indio_dev);
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+ iio_device_free(indio_dev);
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+
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+ return 0;
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+}
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+
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+static const struct spi_device_id ad7923_id[] = {
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+ {"ad7923", 0},
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+ {}
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+};
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+MODULE_DEVICE_TABLE(spi, ad7923_id);
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+
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+static struct spi_driver ad7923_driver = {
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+ .driver = {
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+ .name = "ad7923",
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = ad7923_probe,
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+ .remove = ad7923_remove,
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+ .id_table = ad7923_id,
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+};
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+module_spi_driver(ad7923_driver);
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+
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+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
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+MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>");
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+MODULE_DESCRIPTION("Analog Devices AD7923 ADC");
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+MODULE_LICENSE("GPL v2");
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