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@@ -85,14 +85,14 @@ void save_fpu(struct task_struct *tsk)
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"fmov.s fr1, @-%0\n\t"
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"fmov.s fr0, @-%0\n\t"
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"lds %3, fpscr\n\t":"=r" (dummy)
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- :"0"((char *)(&tsk->thread.fpu.hard.status)),
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+ :"0"((char *)(&tsk->thread.xstate->hardfpu.status)),
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"r"(FPSCR_RCHG), "r"(FPSCR_INIT)
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:"memory");
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disable_fpu();
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}
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-static void restore_fpu(struct task_struct *tsk)
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+void restore_fpu(struct task_struct *tsk)
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{
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unsigned long dummy;
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@@ -135,62 +135,11 @@ static void restore_fpu(struct task_struct *tsk)
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"lds.l @%0+, fpscr\n\t"
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"lds.l @%0+, fpul\n\t"
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:"=r" (dummy)
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- :"0"(&tsk->thread.fpu), "r"(FPSCR_RCHG)
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+ :"0" (tsk->thread.xstate), "r" (FPSCR_RCHG)
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:"memory");
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disable_fpu();
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}
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-/*
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- * Load the FPU with signalling NANS. This bit pattern we're using
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- * has the property that no matter wether considered as single or as
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- * double precision represents signaling NANS.
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- */
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-
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-static void fpu_init(void)
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-{
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- enable_fpu();
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- asm volatile ( "lds %0, fpul\n\t"
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- "lds %1, fpscr\n\t"
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- "fsts fpul, fr0\n\t"
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- "fsts fpul, fr1\n\t"
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- "fsts fpul, fr2\n\t"
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- "fsts fpul, fr3\n\t"
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- "fsts fpul, fr4\n\t"
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- "fsts fpul, fr5\n\t"
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- "fsts fpul, fr6\n\t"
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- "fsts fpul, fr7\n\t"
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- "fsts fpul, fr8\n\t"
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- "fsts fpul, fr9\n\t"
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- "fsts fpul, fr10\n\t"
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- "fsts fpul, fr11\n\t"
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- "fsts fpul, fr12\n\t"
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- "fsts fpul, fr13\n\t"
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- "fsts fpul, fr14\n\t"
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- "fsts fpul, fr15\n\t"
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- "frchg\n\t"
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- "fsts fpul, fr0\n\t"
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- "fsts fpul, fr1\n\t"
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- "fsts fpul, fr2\n\t"
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- "fsts fpul, fr3\n\t"
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- "fsts fpul, fr4\n\t"
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- "fsts fpul, fr5\n\t"
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- "fsts fpul, fr6\n\t"
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- "fsts fpul, fr7\n\t"
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- "fsts fpul, fr8\n\t"
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- "fsts fpul, fr9\n\t"
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- "fsts fpul, fr10\n\t"
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- "fsts fpul, fr11\n\t"
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- "fsts fpul, fr12\n\t"
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- "fsts fpul, fr13\n\t"
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- "fsts fpul, fr14\n\t"
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- "fsts fpul, fr15\n\t"
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- "frchg\n\t"
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- "lds %2, fpscr\n\t"
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- : /* no output */
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- :"r" (0), "r"(FPSCR_RCHG), "r"(FPSCR_INIT));
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- disable_fpu();
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-}
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-
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/**
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* denormal_to_double - Given denormalized float number,
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* store double float
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@@ -282,9 +231,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
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/* fcnvsd */
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struct task_struct *tsk = current;
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- if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR))
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+ if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR))
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/* FPU error */
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- denormal_to_double(&tsk->thread.fpu.hard,
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+ denormal_to_double(&tsk->thread.xstate->hardfpu,
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(finsn >> 8) & 0xf);
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else
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return 0;
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@@ -300,9 +249,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
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n = (finsn >> 8) & 0xf;
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m = (finsn >> 4) & 0xf;
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- hx = tsk->thread.fpu.hard.fp_regs[n];
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- hy = tsk->thread.fpu.hard.fp_regs[m];
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- fpscr = tsk->thread.fpu.hard.fpscr;
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+ hx = tsk->thread.xstate->hardfpu.fp_regs[n];
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+ hy = tsk->thread.xstate->hardfpu.fp_regs[m];
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+ fpscr = tsk->thread.xstate->hardfpu.fpscr;
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prec = fpscr & FPSCR_DBL_PRECISION;
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if ((fpscr & FPSCR_CAUSE_ERROR)
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@@ -312,18 +261,18 @@ static int ieee_fpe_handler(struct pt_regs *regs)
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/* FPU error because of denormal (doubles) */
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llx = ((long long)hx << 32)
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- | tsk->thread.fpu.hard.fp_regs[n + 1];
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+ | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
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lly = ((long long)hy << 32)
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- | tsk->thread.fpu.hard.fp_regs[m + 1];
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+ | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
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llx = float64_mul(llx, lly);
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- tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
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- tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff;
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+ tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
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+ tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
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} else if ((fpscr & FPSCR_CAUSE_ERROR)
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&& (!prec && ((hx & 0x7fffffff) < 0x00800000
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|| (hy & 0x7fffffff) < 0x00800000))) {
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/* FPU error because of denormal (floats) */
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hx = float32_mul(hx, hy);
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- tsk->thread.fpu.hard.fp_regs[n] = hx;
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+ tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
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} else
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return 0;
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@@ -338,9 +287,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
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n = (finsn >> 8) & 0xf;
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m = (finsn >> 4) & 0xf;
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- hx = tsk->thread.fpu.hard.fp_regs[n];
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- hy = tsk->thread.fpu.hard.fp_regs[m];
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- fpscr = tsk->thread.fpu.hard.fpscr;
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+ hx = tsk->thread.xstate->hardfpu.fp_regs[n];
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+ hy = tsk->thread.xstate->hardfpu.fp_regs[m];
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+ fpscr = tsk->thread.xstate->hardfpu.fpscr;
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prec = fpscr & FPSCR_DBL_PRECISION;
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if ((fpscr & FPSCR_CAUSE_ERROR)
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@@ -350,15 +299,15 @@ static int ieee_fpe_handler(struct pt_regs *regs)
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/* FPU error because of denormal (doubles) */
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llx = ((long long)hx << 32)
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- | tsk->thread.fpu.hard.fp_regs[n + 1];
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+ | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
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lly = ((long long)hy << 32)
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- | tsk->thread.fpu.hard.fp_regs[m + 1];
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+ | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
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if ((finsn & 0xf00f) == 0xf000)
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llx = float64_add(llx, lly);
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else
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llx = float64_sub(llx, lly);
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- tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
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- tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff;
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+ tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
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+ tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
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} else if ((fpscr & FPSCR_CAUSE_ERROR)
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&& (!prec && ((hx & 0x7fffffff) < 0x00800000
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|| (hy & 0x7fffffff) < 0x00800000))) {
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@@ -367,7 +316,7 @@ static int ieee_fpe_handler(struct pt_regs *regs)
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hx = float32_add(hx, hy);
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else
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hx = float32_sub(hx, hy);
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- tsk->thread.fpu.hard.fp_regs[n] = hx;
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+ tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
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} else
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return 0;
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@@ -382,9 +331,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
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n = (finsn >> 8) & 0xf;
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m = (finsn >> 4) & 0xf;
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- hx = tsk->thread.fpu.hard.fp_regs[n];
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- hy = tsk->thread.fpu.hard.fp_regs[m];
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- fpscr = tsk->thread.fpu.hard.fpscr;
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+ hx = tsk->thread.xstate->hardfpu.fp_regs[n];
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+ hy = tsk->thread.xstate->hardfpu.fp_regs[m];
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+ fpscr = tsk->thread.xstate->hardfpu.fpscr;
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prec = fpscr & FPSCR_DBL_PRECISION;
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if ((fpscr & FPSCR_CAUSE_ERROR)
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@@ -394,20 +343,20 @@ static int ieee_fpe_handler(struct pt_regs *regs)
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/* FPU error because of denormal (doubles) */
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llx = ((long long)hx << 32)
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- | tsk->thread.fpu.hard.fp_regs[n + 1];
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+ | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
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lly = ((long long)hy << 32)
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- | tsk->thread.fpu.hard.fp_regs[m + 1];
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+ | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
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llx = float64_div(llx, lly);
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- tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
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- tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff;
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+ tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
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+ tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
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} else if ((fpscr & FPSCR_CAUSE_ERROR)
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&& (!prec && ((hx & 0x7fffffff) < 0x00800000
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|| (hy & 0x7fffffff) < 0x00800000))) {
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/* FPU error because of denormal (floats) */
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hx = float32_div(hx, hy);
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- tsk->thread.fpu.hard.fp_regs[n] = hx;
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+ tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
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} else
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return 0;
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@@ -420,17 +369,17 @@ static int ieee_fpe_handler(struct pt_regs *regs)
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unsigned int hx;
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m = (finsn >> 8) & 0x7;
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- hx = tsk->thread.fpu.hard.fp_regs[m];
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+ hx = tsk->thread.xstate->hardfpu.fp_regs[m];
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- if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR)
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+ if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR)
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&& ((hx & 0x7fffffff) < 0x00100000)) {
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/* subnormal double to float conversion */
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long long llx;
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- llx = ((long long)tsk->thread.fpu.hard.fp_regs[m] << 32)
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- | tsk->thread.fpu.hard.fp_regs[m + 1];
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+ llx = ((long long)tsk->thread.xstate->hardfpu.fp_regs[m] << 32)
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+ | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
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- tsk->thread.fpu.hard.fpul = float64_to_float32(llx);
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+ tsk->thread.xstate->hardfpu.fpul = float64_to_float32(llx);
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} else
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return 0;
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@@ -449,7 +398,7 @@ void float_raise(unsigned int flags)
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int float_rounding_mode(void)
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{
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struct task_struct *tsk = current;
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- int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.fpu.hard.fpscr);
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+ int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.xstate->hardfpu.fpscr);
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return roundingMode;
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}
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@@ -461,16 +410,16 @@ BUILD_TRAP_HANDLER(fpu_error)
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__unlazy_fpu(tsk, regs);
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fpu_exception_flags = 0;
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if (ieee_fpe_handler(regs)) {
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- tsk->thread.fpu.hard.fpscr &=
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+ tsk->thread.xstate->hardfpu.fpscr &=
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~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
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- tsk->thread.fpu.hard.fpscr |= fpu_exception_flags;
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+ tsk->thread.xstate->hardfpu.fpscr |= fpu_exception_flags;
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/* Set the FPSCR flag as well as cause bits - simply
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* replicate the cause */
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- tsk->thread.fpu.hard.fpscr |= (fpu_exception_flags >> 10);
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+ tsk->thread.xstate->hardfpu.fpscr |= (fpu_exception_flags >> 10);
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grab_fpu(regs);
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restore_fpu(tsk);
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task_thread_info(tsk)->status |= TS_USEDFPU;
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- if ((((tsk->thread.fpu.hard.fpscr & FPSCR_ENABLE_MASK) >> 7) &
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+ if ((((tsk->thread.xstate->hardfpu.fpscr & FPSCR_ENABLE_MASK) >> 7) &
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(fpu_exception_flags >> 2)) == 0) {
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return;
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}
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@@ -478,33 +427,3 @@ BUILD_TRAP_HANDLER(fpu_error)
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force_sig(SIGFPE, tsk);
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}
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-
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-void fpu_state_restore(struct pt_regs *regs)
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-{
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- struct task_struct *tsk = current;
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-
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- grab_fpu(regs);
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- if (unlikely(!user_mode(regs))) {
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- printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
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- BUG();
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- return;
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- }
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-
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- if (likely(used_math())) {
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- /* Using the FPU again. */
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- restore_fpu(tsk);
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- } else {
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- /* First time FPU user. */
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- fpu_init();
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- set_used_math();
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- }
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- task_thread_info(tsk)->status |= TS_USEDFPU;
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- tsk->fpu_counter++;
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-}
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-
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-BUILD_TRAP_HANDLER(fpu_state_restore)
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-{
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- TRAP_HANDLER_DECL;
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-
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- fpu_state_restore(regs);
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-}
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